mx35: flea3: fix when cache functions are linked

[u-boot] / include / configs / gdppc440etx.h

diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h
index 282afbcc6100e24cacfb0362166ff9a5081e6bcb..3c59ff4922c86948373869f045146ce259f5a607 100644 (file)
--- a/include/configs/gdppc440etx.h
+++ b/include/configs/gdppc440etx.h
@@ -72,10 +72,9 @@
  */
 #define CONFIG_SYS_INIT_RAM_DCACHE     1               /* d-cache as init ram*/
 #define CONFIG_SYS_INIT_RAM_ADDR       0x70000000      /* DCache             */
-#define CONFIG_SYS_INIT_RAM_END                (4 << 10)
-#define CONFIG_SYS_GBL_DATA_SIZE       256             /* num bytes init data*/
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END \
-                                        - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE               (4 << 10)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE \
+                                        - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*