ppc4xx: Update CPCI405(AB) configuration

[u-boot] / include / configs / gr_xc3s_1500.h

diff --git a/include/configs/gr_xc3s_1500.h b/include/configs/gr_xc3s_1500.h
index 1fdef3d4ab8cae5391a5f76fdd311b2c41b50030..f019bb44eabd71729bb55274d0b2292747ad94de 100644 (file)
--- a/include/configs/gr_xc3s_1500.h
+++ b/include/configs/gr_xc3s_1500.h
@@ -39,7 +39,7 @@
 #define CONFIG_GRXC3S1500      1       /* ... on GR-XC3S-1500 board */
 
 /* CPU / AMBA BUS configuration */
-#define CONFIG_SYS_CLK_FREQ    40000000        /* 40MHz */
+#define CONFIG_SYS_CLK_FREQ    40000000        /* 40MHz */
 
 /* Number of SPARC register windows */
 #define CFG_SPARC_NWINDOWS 8
@@ -172,7 +172,7 @@
 
 /*** CFI CONFIG ***/
 #define CFG_FLASH_CFI_WIDTH    FLASH_CFI_8BIT
-#define CFG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_DRIVER
 #define CFG_FLASH_CFI
 /* Bypass cache when reading regs from flash memory */
 #define CFG_FLASH_CFI_BYPASS_READ