]> git.sur5r.net Git - u-boot/blobdiff - include/configs/igep0033.h
Merge branch 'master' of git://git.denx.de/u-boot-arm
[u-boot] / include / configs / igep0033.h
index dd21a467830196ee1da141a051f60793eeebd332..3e18a657faa6f94b6f20c013f03ea142d183c914 100644 (file)
 #define V_OSCK                         24000000  /* Clock output from T2 */
 #define V_SCLK                         (V_OSCK)
 
-/* DMA defines */
-#define CONFIG_DMA_COHERENT
-#define CONFIG_DMA_COHERENT_SIZE       (1 << 20)
-
 #define CONFIG_ENV_SIZE                        (128 << 10)     /* 128 KiB */
 #define CONFIG_SYS_MALLOC_LEN          (1024 << 10)
 #define CONFIG_SYS_LONGHELP            /* undef to save memory */
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
 #define CONFIG_SYS_LOAD_ADDR           0x81000000 /* Default load address */
-#define CONFIG_SYS_HZ                  1000 /* 1ms clock */
 
 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS           1               /*  1 bank of DRAM */
-#define PHYS_DRAM_1                    0x80000000      /* DRAM Bank #1 */
 #define CONFIG_MAX_RAM_BANK_SIZE       (1024 << 20)    /* 1GB */
 
-#define CONFIG_SYS_SDRAM_BASE          PHYS_DRAM_1
+#define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
                                                GENERATED_GBL_DATA_SIZE)
 /* Platform/Board specific defs */
 #define CONFIG_SYS_TIMERBASE           0x48040000      /* Use Timer2 */
 #define CONFIG_SYS_PTV                 2       /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ                  1000
+#define CONFIG_SYS_HZ                  1000    /* 1ms clock */
 
 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_CLK         (48000000)
 #define CONFIG_SYS_NS16550_COM1                0x44e09000      /* UART0 */
 
-#define CONFIG_SERIAL_MULTI
 #define CONFIG_CONS_INDEX              1
 #define CONFIG_BAUDRATE                        115200
 
 /* Ethernet support */
 #define CONFIG_DRIVER_TI_CPSW
 #define CONFIG_MII
-#define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       14
 
-#define CONFIG_SYS_NAND_ECCSTEPS       4
-#define        CONFIG_SYS_NAND_ECCTOTAL        (CONFIG_SYS_NAND_ECCBYTES * \
-                                               CONFIG_SYS_NAND_ECCSTEPS)
-
 #define        CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000