DaVinci DM6467: Enhance board Support

[u-boot] / include / configs / imx31_litekit.h

diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h
index 49048563cb5cd5a9a9475471cc76288c1d761b30..50236380704236b079baef9f4fdd1689b22a1c11 100644 (file)
--- a/include/configs/imx31_litekit.h
+++ b/include/configs/imx31_litekit.h
@@ -54,7 +54,6 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 128 * 1024)
-#define CONFIG_SYS_GBL_DATA_SIZE       128  /* size in bytes reserved for initial data */
 
 /*
  * Hardware drivers
@@ -66,13 +65,13 @@
 #define CONFIG_HARD_SPI                1
 #define CONFIG_MXC_SPI         1
 #define CONFIG_DEFAULT_SPI_BUS 1
-#define CONFIG_DEFAULT_SPI_MODE        (SPI_MODE_2 | SPI_CS_HIGH)
+#define CONFIG_DEFAULT_SPI_MODE        (SPI_MODE_0 | SPI_CS_HIGH)
 
 #define CONFIG_FSL_PMIC
 #define CONFIG_FSL_PMIC_BUS    1
 #define CONFIG_FSL_PMIC_CS     0
 #define CONFIG_FSL_PMIC_CLK    1000000
-#define CONFIG_FSL_PMIC_MODE   (SPI_MODE_2 | SPI_CS_HIGH)
+#define CONFIG_FSL_PMIC_MODE   (SPI_MODE_0 | SPI_CS_HIGH)
 
 #define CONFIG_RTC_MC13783     1
 
@@ -147,6 +146,12 @@
 #define PHYS_SDRAM_1           CSD0_BASE
 #define PHYS_SDRAM_1_SIZE      (128 * 1024 * 1024)
 
+#define CONFIG_SYS_SDRAM_BASE          CSD0_BASE
+#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE               IRAM_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
+
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */