85xx: Drop FIT support to allow u-boot image to fit in 512k

[u-boot] / include / configs / kilauea.h

diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 965599c7a7b94fdb08b90c2d0a866fccfd825995..a79feec16dfbddf363cf122548a61c5ce944eee0 100644 (file)
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -47,6 +47,7 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F 1            /* Call board_early_init_f */
 #define CONFIG_MISC_INIT_R     1               /* Call misc_init_r     */
+#define CONFIG_BOARD_TYPES
 #define CONFIG_BOARD_EMAC_COUNT
 
 /*-----------------------------------------------------------------------
@@ -217,8 +218,6 @@
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1       /* nand driver supports mutipl. chips   */
 
-#define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */
-
 /*-----------------------------------------------------------------------
  * DDR SDRAM
  *----------------------------------------------------------------------*/
@@ -522,9 +521,22 @@
 #define CONFIG_SYS_EBC_PB1CR           (CONFIG_SYS_NAND_ADDR | 0x1e000)
 #endif
 
-/* Memory Bank 2 (FPGA) initialization                                         */
-#define CONFIG_SYS_EBC_PB2AP           0x9400C800
-#define CONFIG_SYS_EBC_PB2CR           (CONFIG_SYS_FPGA_BASE | 0x18000)
+/* Memory Bank 2 (FPGA) initialization                                 */
+#define CONFIG_SYS_EBC_PB2AP           (EBC_BXAP_BME_ENABLED |         \
+                                        EBC_BXAP_FWT_ENCODE(6) |       \
+                                        EBC_BXAP_BWT_ENCODE(1) |       \
+                                        EBC_BXAP_BCE_DISABLE |         \
+                                        EBC_BXAP_BCT_2TRANS |          \
+                                        EBC_BXAP_CSN_ENCODE(0) |       \
+                                        EBC_BXAP_OEN_ENCODE(0) |       \
+                                        EBC_BXAP_WBN_ENCODE(3) |       \
+                                        EBC_BXAP_WBF_ENCODE(1) |       \
+                                        EBC_BXAP_TH_ENCODE(4) |        \
+                                        EBC_BXAP_RE_DISABLED |         \
+                                        EBC_BXAP_SOR_DELAYED |         \
+                                        EBC_BXAP_BEM_WRITEONLY |       \
+                                        EBC_BXAP_PEN_DISABLED)
+#define CONFIG_SYS_EBC_PB2CR   (CONFIG_SYS_FPGA_BASE | 0x18000)
 
 #define CONFIG_SYS_EBC_CFG             0x7FC00000 /*  EBC0_CFG */
 
@@ -573,7 +585,7 @@
  * Some Kilauea stuff..., mainly fpga registers
  */
 #define CONFIG_SYS_FPGA_REG_BASE               CONFIG_SYS_FPGA_BASE
-#define CONFIG_SYS_FPGA_FIFO_BASE              (in32(CONFIG_SYS_FPGA_BASE) | (1 << 10))
+#define CONFIG_SYS_FPGA_FIFO_BASE              (CONFIG_SYS_FPGA_BASE | (1 << 10))
 
 /* interrupt */
 #define CONFIG_SYS_FPGA_SLIC0_R_DPRAM_INT      0x80000000
@@ -604,4 +616,8 @@
 #define CONFIG_SYS_FPGA_USER_LED0              0x00000200
 #define CONFIG_SYS_FPGA_USER_LED1              0x00000100
 
+#define CONFIG_SYS_FPGA_MAGIC_MASK             0xffff0000
+#define CONFIG_SYS_FPGA_MAGIC                  0xabcd0000
+#define CONFIG_SYS_FPGA_VER_MASK               0x0000ff00
+
 #endif /* __CONFIG_H */