]> git.sur5r.net Git - u-boot/blobdiff - include/configs/kmsupx5.h
microblaze: Enable TFTP put command
[u-boot] / include / configs / kmsupx5.h
index 55ed3f6a490c2da3e818d0183857b0135600cf62..b0dd88cd78098d11221255b06ca7fcdfbcbdccaa 100644 (file)
@@ -36,7 +36,7 @@
 #define        CONFIG_SYS_TEXT_BASE    0xF0000000
 
 /* include common defines/options for all 8321 Keymile boards */
-#include "km8321-common.h"
+#include "km/km8321-common.h"
 
 /*
  * Init Local Bus Memory Controller:
                                 OR_GPCM_CSNT | \
                                 OR_GPCM_ACS_DIV4 | \
                                 OR_GPCM_SCY_2 | \
-                                (OR_GPCM_TRLX & \
-                                (~OR_GPCM_EHTR)) |  /* EHTR = 0 */ \
+                                OR_GPCM_TRLX_SET | \
+                                OR_GPCM_EHTR_CLEAR | \
                                 OR_GPCM_EAD)
 
 /* LPXF:  icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L      (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \
+#define CONFIG_SYS_IBAT5L      (CONFIG_SYS_LPXF_BASE | BATL_PP_RW | \
                                 BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT5U      (CONFIG_SYS_LPXF_BASE | BATU_BL_256M | \
                                 BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT5L      (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \
+#define CONFIG_SYS_DBAT5L      (CONFIG_SYS_LPXF_BASE | BATL_PP_RW | \
                                 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_DBAT5U      CONFIG_SYS_IBAT5U