ARM: versatile: pass console setting to the kernel

[u-boot] / include / configs / lager.h

diff --git a/include/configs/lager.h b/include/configs/lager.h
index 7819edddc6c6cf762a26dfa61ee3c7b2ecfc0f60..893282540e3943ad20cb659c161f67dc1f7a8171 100644 (file)
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -28,6 +28,11 @@
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_RUN
 #define CONFIG_CMD_LOADS
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NFS
 #define CONFIG_CMD_BOOTZ
 #define        CONFIG_CMD_FLASH
 
@@ -127,12 +132,42 @@
 #define CONFIG_ENV_SIZE                (CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
 
+/* SH Ether */
+#define        CONFIG_NET_MULTI
+#define CONFIG_SH_ETHER
+#define CONFIG_SH_ETHER_USE_PORT       0
+#define CONFIG_SH_ETHER_PHY_ADDR       0x1
+#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CONFIG_SH_ETHER_ALIGNE_SIZE    64
+#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MICREL
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI
+
+/* I2C */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_RCAR
+#define CONFIG_SYS_RCAR_I2C0_BASE      0xE6508000
+#define CONFIG_SYS_RCAR_I2C0_SPEED     400000
+#define CONFIG_SYS_RCAR_I2C1_BASE      0xE6518000
+#define CONFIG_SYS_RCAR_I2C1_SPEED     400000
+#define CONFIG_SYS_RCAR_I2C2_BASE      0xE6530000
+#define CONFIG_SYS_RCAR_I2C2_SPEED     400000
+#define CONFIG_SYS_RCAR_I2C3_BASE      0xE6540000
+#define CONFIG_SYS_RCAR_I2C3_SPEED     400000
+#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS    4
+
+#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
+
 /* Board Clock */
 #define CONFIG_BASE_CLK_FREQ   20000000u
 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_BASE_CLK_FREQ / 2) /* EXT / 2 */
 #define CONFIG_PLL1_CLK_FREQ   (CONFIG_BASE_CLK_FREQ * 156 / 2)
 #define CONFIG_PLL1_DIV2_CLK_FREQ      (CONFIG_PLL1_CLK_FREQ / 2)
 #define CONFIG_MP_CLK_FREQ     (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
+#define CONFIG_HP_CLK_FREQ     (CONFIG_PLL1_CLK_FREQ / 12)
 #define CONFIG_SH_SCIF_CLK_FREQ        CONFIG_MP_CLK_FREQ
 
 #define CONFIG_SYS_TMU_CLK_DIV 4