#define CONFIG_LS102XA
-#define CONFIG_ARMV7_PSCI
+#define CONFIG_ARMV7_PSCI_1_0
+
+#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
#define CONFIG_SYS_FSL_CLK
#define QIXIS_LBMAP_SHIFT 0
#define QIXIS_LBMAP_DFLTBANK 0x00
#define QIXIS_LBMAP_ALTBANK 0x04
+#define QIXIS_PWR_CTL 0x21
+#define QIXIS_PWR_CTL_POWEROFF 0x80
#define QIXIS_RST_CTL_RESET 0x44
#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
* MMC
*/
#define CONFIG_MMC
-#define CONFIG_CMD_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_GENERIC_MMC
-#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
/* SPI */
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_XHCI_DWC3
-#define CONFIG_USB_XHCI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
-#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)
-#define CONFIG_USB_STORAGE
-#define CONFIG_CMD_EXT2
-#endif
-
/*
* Video
*/
/* PCIe */
#define CONFIG_PCI /* Enable PCI/PCIE */
-#define CONFIG_PCIE1 /* PCIE controler 1 */
-#define CONFIG_PCIE2 /* PCIE controler 2 */
+#define CONFIG_PCIE1 /* PCIE controller 1 */
+#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
#define CONFIG_CMD_PCI
#endif
-#define CONFIG_CMD_MII
-
#define CONFIG_CMDLINE_TAG
#define CONFIG_CMDLINE_EDITING
#define CONFIG_FSL_DEVICE_DISABLE
-#define CONFIG_BOOTDELAY 3
#define CONFIG_SYS_QE_FW_ADDR 0x600c0000
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_CMD_GREPENV
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif
-#define CONFIG_CMD_BOOTZ
-
#define CONFIG_MISC_INIT_R
/* Hash command with SHA acceleration supported in hardware */