]> git.sur5r.net Git - u-boot/blobdiff - include/configs/ls2080aqds.h
Merge branch 'master' of git://git.denx.de/u-boot
[u-boot] / include / configs / ls2080aqds.h
index e634d2512ae7321238c780c4a3e7b7d5821d7c5c..838568fd216ca52ecfa050f8aa13df7a57f9246f 100644 (file)
@@ -9,8 +9,6 @@
 
 #include "ls2080a_common.h"
 
-#define CONFIG_DISPLAY_BOARDINFO
-
 #ifndef __ASSEMBLY__
 unsigned long get_board_sys_clk(void);
 unsigned long get_board_ddr_clk(void);
@@ -172,11 +170,13 @@ unsigned long get_board_ddr_clk(void);
 #define QIXIS_LBMAP_DFLTBANK           0x00
 #define QIXIS_LBMAP_ALTBANK            0x04
 #define QIXIS_LBMAP_NAND               0x09
+#define QIXIS_LBMAP_QSPI               0x0f
 #define QIXIS_RST_CTL_RESET            0x31
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE   0x20
 #define QIXIS_RCFG_CTL_RECONFIG_START  0x21
 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE  0x08
 #define QIXIS_RCW_SRC_NAND             0x107
+#define QIXIS_RCW_SRC_QSPI             0x62
 #define        QIXIS_RST_FORCE_MEM             0x01
 
 #define CONFIG_SYS_CSPR3_EXT   (0x0)
@@ -267,11 +267,19 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NAND_FTIM3
 
+#if defined(CONFIG_QSPI_BOOT)
+#define CONFIG_SYS_TEXT_BASE           0x20010000
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
+#define CONFIG_ENV_OFFSET              0x100000        /* 1MB */
+#define CONFIG_ENV_SECT_SIZE           0x10000
+#else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR                        (CONFIG_SYS_FLASH_BASE + 0x200000)
 #define CONFIG_ENV_SECT_SIZE           0x20000
 #define CONFIG_ENV_SIZE                        0x2000
 #endif
+#endif
 
 /* Debug Server firmware */
 #define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
@@ -339,11 +347,9 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 
 #define CONFIG_FSL_MEMAC
-#define CONFIG_PCI             /* Enable PCIE */
 #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
 
 #ifdef CONFIG_PCI
-#define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_CMD_PCI
 #endif
@@ -415,7 +421,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT                2
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS     2
-#define CONFIG_USB_STORAGE
 
 #include <asm/fsl_secure_boot.h>