ppc4xx: remove PMC405 board

[u-boot] / include / configs / ls2085a_common.h

diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h
index 5ac7623f76288612b4c084586a2beead5bbdba3f..6fe032c9ff64fb6b89f107095af3b9f38ca4998b 100644 (file)
--- a/include/configs/ls2085a_common.h
+++ b/include/configs/ls2085a_common.h
@@ -15,7 +15,7 @@
 #define CONFIG_GICV3
 
 /* Link Definitions */
-#define CONFIG_SYS_TEXT_BASE           0x30000000
+#define CONFIG_SYS_TEXT_BASE           0x30001000
 
 #ifdef CONFIG_EMU
 #define CONFIG_SYS_NO_FLASH
@@ -47,15 +47,17 @@
 
 #define CONFIG_SYS_FSL_DDR_INTLV_256B  /* force 256 byte interleaving */
 
-/* SMP Definitions */
-#define CPU_RELEASE_ADDR               CONFIG_SYS_INIT_SP_ADDR
-
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY      0
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_SYS_DDR_BLOCK2_BASE     0x8080000000ULL
 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS      2
 
+/*
+ * SMP Definitinos
+ */
+#define CPU_RELEASE_ADDR               secondary_boot_func
+
 #define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
 #define CONFIG_SYS_DP_DDR_BASE         0x6000000000ULL
 /*
@@ -241,6 +243,7 @@
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
+#define CONFIG_ARCH_EARLY_INIT_R
 
 /* Physical Memory Map */
 /* fixme: these need to be checked against the board */
@@ -250,8 +253,6 @@
 
 #define CONFIG_NR_DRAM_BANKS           3
 
-#define CONFIG_SYS_HZ                  1000
-
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           128