]> git.sur5r.net Git - u-boot/blobdiff - include/configs/ls2085ardb.h
usb: dwc3: Add DWC3 controller driver support
[u-boot] / include / configs / ls2085ardb.h
index ed0ed7ab9912a2305809d0dd2dbfbc46228b1715..41eb55b4bfd136762fcfe84f6199803df7c9d20c 100644 (file)
@@ -8,8 +8,6 @@
 #define __LS2_RDB_H
 
 #include "ls2085a_common.h"
-#define CONFIG_IDENT_STRING            " LS2085A-RDB"
-#define CONFIG_BOOTP_VCI_STRING                "U-boot.LS2085A-RDB"
 
 #undef CONFIG_CONS_INDEX
 #define CONFIG_CONS_INDEX       2
@@ -30,8 +28,8 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #define SPD_EEPROM_ADDRESS1    0x51
 #define SPD_EEPROM_ADDRESS2    0x52
-#define SPD_EEPROM_ADDRESS3    0x54
-#define SPD_EEPROM_ADDRESS4    0x53    /* Board error */
+#define SPD_EEPROM_ADDRESS3    0x53
+#define SPD_EEPROM_ADDRESS4    0x54
 #define SPD_EEPROM_ADDRESS5    0x55
 #define SPD_EEPROM_ADDRESS6    0x56    /* dummy address */
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1
@@ -235,16 +233,26 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_LS_MC_DPC_ADDR      0x580800000ULL
 
 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
+#define CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
+#define CONFIG_SYS_LS_MC_AIOP_IMG_ADDR 0x580900000ULL
 
 /*
  * I2C
  */
-#define I2C_MUX_PCA_ADDR               0x77
-#define I2C_MUX_PCA_ADDR_PRI           0x77 /* Primary Mux*/
+#define I2C_MUX_PCA_ADDR               0x75
+#define I2C_MUX_PCA_ADDR_PRI           0x75 /* Primary Mux*/
 
 /* I2C bus multiplexer */
 #define I2C_MUX_CH_DEFAULT      0x8
 
+/* SPI */
+#ifdef CONFIG_FSL_DSPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_BAR
+#endif
+
 /*
  * RTC configuration
  */
@@ -299,7 +307,7 @@ unsigned long get_board_sys_clk(void);
        "initrd_high=0xffffffffffffffff\0"      \
        "kernel_start=0x581100000\0"            \
        "kernel_load=0xa0000000\0"              \
-       "kernel_size=0x1000000\0"
+       "kernel_size=0x2800000\0"
 
 /* MAC/PHY configuration */
 #ifdef CONFIG_FSL_MC_ENET
@@ -322,6 +330,7 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_MII
 #define CONFIG_ETHPRIME                "DPNI1"
 #define CONFIG_PHY_GIGE
+#define CONFIG_PHY_AQUANTIA
 #endif
 
 #endif /* __LS2_RDB_H */