#ifndef __M53EVK_CONFIG_H__
#define __M53EVK_CONFIG_H__
-#define CONFIG_MXC_GPIO
-
#include <asm/arch/imx-regs.h>
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#define CONFIG_SYS_TEXT_BASE 0x71000000
-
/*
* U-Boot general configurations
*/
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT "nand0=mxc_nand"
-#define MTDPARTS_DEFAULT \
- "mtdparts=mxc_nand:" \
- "1024k(u-boot)," \
- "512k(env1)," \
- "512k(env2)," \
- "14m(boot)," \
- "240m(data)," \
- "-@2048k(UBI)"
#endif
/*
* SATA
*/
#ifdef CONFIG_CMD_SATA
-#define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
#define CONFIG_LBA48
-#define CONFIG_LIBATA
#endif
/*
/*
* NAND SPL
*/
-#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
#define CONFIG_SPL_TEXT_BASE 0x70008000
#define CONFIG_SPL_PAD_TO 0x8000