#define CONFIG_SYS_64BIT_VSPRINTF
#define CONFIG_BOARD_EARLY_INIT_F
-#define BOARD_LATE_INIT
+#define CONFIG_BOARD_LATE_INIT
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0xfe
#define CONFIG_MXC_SPI
+#define CONFIG_MXC_GPIO
/*
* PMIC Configs
*/
-#define CONFIG_FSL_PMIC
-#define CONFIG_FSL_PMIC_I2C
+#define CONFIG_PMIC
+#define CONFIG_PMIC_I2C
+#define CONFIG_PMIC_FSL
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
+#define CONFIG_RTC_MC13XXX
/*
* MFD MC9SDZ60
* UART (console)
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX35_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_NET_RETRY_COUNT 100
+#define CONFIG_CMD_DATE
#define CONFIG_BOOTDELAY 3
#define CONFIG_SMC911X_BASE CS5_BASE_ADDR
#define CONFIG_HAS_ETH1
-#define CONFIG_NET_MULTI
#define CONFIG_ETHPRIME
/*
/*
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_NR_DRAM_BANKS 2
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
-#define iomem_valid_addr(addr, size) \
- (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
+#define PHYS_SDRAM_2 CSD1_BASE_ADDR
+#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)