]> git.sur5r.net Git - u-boot/blobdiff - include/configs/mx6qsabreauto.h
usb: dwc3: Add DWC3 controller driver support
[u-boot] / include / configs / mx6qsabreauto.h
index 3f1c88e239f47c3d5679fc255719a742f36ba76d..22603442d73f79903434584f7c68e7129585c3b1 100644 (file)
 
 #include "mx6sabre_common.h"
 
+#undef CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_FLASH_BASE           WEIM_ARB_BASE_ADDR
+#define CONFIG_SYS_FLASH_SECT_SIZE      (128 * 1024)
+#define CONFIG_SYS_MAX_FLASH_BANKS 1    /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 256   /* max number of sectors on one chip */
+#define CONFIG_SYS_FLASH_CFI            /* Flash memory is CFI compliant */
+#define CONFIG_FLASH_CFI_DRIVER         /* Use drivers/cfi_flash.c */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #if defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_SYS_MMC_ENV_DEV         0
@@ -46,6 +56,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 
 /* NAND flash command */
 #define CONFIG_APBH_DMA_BURST
 #define CONFIG_APBH_DMA_BURST8
 
+/* PMIC */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_PFUZE100
+#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
+
 #endif                         /* __MX6QSABREAUTO_CONFIG_H */