]> git.sur5r.net Git - u-boot/blobdiff - include/configs/mx6sabresd.h
imx:mx6sxsabresd add qspi support
[u-boot] / include / configs / mx6sabresd.h
index 57e1860b1b1a6354138a36f0c6b02ea5a78fc6b3..a346542130d69fa33daf9b484b3221a6c08d7bd5 100644 (file)
@@ -9,13 +9,28 @@
 #ifndef __MX6QSABRESD_CONFIG_H
 #define __MX6QSABRESD_CONFIG_H
 
+#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
+
+#ifdef CONFIG_SPL
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#include "imx6_spl.h"
+#endif
+
 #define CONFIG_MACH_TYPE       3980
 #define CONFIG_MXC_UART_BASE   UART1_BASE
 #define CONFIG_CONSOLE_DEV             "ttymxc0"
 #define CONFIG_MMCROOT                 "/dev/mmcblk1p2"
+#if defined(CONFIG_MX6Q)
 #define CONFIG_DEFAULT_FDT_FILE        "imx6q-sabresd.dtb"
+#elif defined(CONFIG_MX6DL)
+#define CONFIG_DEFAULT_FDT_FILE        "imx6dl-sabresd.dtb"
+#endif
 #define PHYS_SDRAM_SIZE                (1u * 1024 * 1024 * 1024)
 
+#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
+
 #include "mx6sabre_common.h"
 
 #define CONFIG_SYS_FSL_USDHC_NUM       3
 #define CONFIG_SYS_MMC_ENV_DEV         1       /* SDHC3 */
 #endif
 
+#define CONFIG_CMD_PCI
+#ifdef CONFIG_CMD_PCI
+#define CONFIG_PCI
+#define CONFIG_PCI_PNP
+#define CONFIG_PCI_SCAN_SHOW
+#define CONFIG_PCIE_IMX
+#define CONFIG_PCIE_IMX_PERST_GPIO     IMX_GPIO_NR(7, 12)
+#define CONFIG_PCIE_IMX_POWER_GPIO     IMX_GPIO_NR(3, 19)
+#endif
+
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_SPEED             100000
+
+/* PMIC */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_PFUZE100
+#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
+
 #endif                         /* __MX6QSABRESD_CONFIG_H */