s5pc1xx: add support SMDKC100 board

[u-boot] / include / configs / netstar.h

diff --git a/include/configs/netstar.h b/include/configs/netstar.h
index e0cc7186a9d345d5d02c803463012b0b6f67ee95..7bddf2444b029e3d4be7089d1652eae5438ed6b9 100644 (file)
--- a/include/configs/netstar.h
+++ b/include/configs/netstar.h
@@ -93,7 +93,8 @@
 #define CONFIG_SYS_NS16550_CLK         (CONFIG_XTAL_FREQ)      /* can be 12M/32Khz or 48Mhz  */
 #define CONFIG_SYS_NS16550_COM1                OMAP1510_UART1_BASE     /* uart1 */
 
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
 #define CONFIG_SMC91111_BASE           0x04000300
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
@@ -110,6 +111,16 @@
 #define CONFIG_SYS_NAND_BASE           0x04000000 + (2 << 23)
 #define NAND_ALLOW_ERASE_ALL           1
 
+#define CONFIG_SYS_64BIT_VSPRINTF              /* needed for nand_util.c */
+
+#define CONFIG_HARD_I2C
+#define CONFIG_SYS_I2C_SPEED           100000
+#define CONFIG_SYS_I2C_SLAVE           1
+#define CONFIG_DRIVER_OMAP1510_I2C
+
+#define CONFIG_RTC_DS1307
+#define CONFIG_SYS_I2C_RTC_ADDR                0x68
+
 
 #define CONFIG_CONS_INDEX              1
 #define CONFIG_BAUDRATE                        115200
@@ -122,6 +133,8 @@
  * partitions (mtdparts command line support)
  */
 #define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE              /* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT         "nor0=omapflash.0,nand0=omapnand.0"
 #define MTDPARTS_DEFAULT       "mtdparts=" \
        "omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
@@ -133,6 +146,7 @@
  */
 #define CONFIG_CMD_BDI
 #define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_DATE
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_SAVEENV
 #define CONFIG_CMD_FLASH
@@ -213,12 +227,12 @@
 
 #define CONFIG_SYS_LOAD_ADDR           PHYS_SDRAM_1 + 0x400000 /* default load address */
 
-/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
+/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
  * This time is further subdivided by a local divisor.
  */
 #define CONFIG_SYS_TIMERBASE           OMAP1510_TIMER1_BASE
-#define CONFIG_SYS_PVT                 7               /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ                  ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV                 7
+#define CONFIG_SYS_HZ                  1000
 
 #define OMAP5910_DPLL_DIV      1
 #define OMAP5910_DPLL_MUL      ((CONFIG_SYS_CLK_FREQ * \