ppc4xx: Update CPCI405(AB) configuration

[u-boot] / include / configs / omap1610inn.h

diff --git a/include/configs/omap1610inn.h b/include/configs/omap1610inn.h
index d65e2a01d6fc35211467fa2e56322423d3c41bb5..734f3543927a4e28dfebdb497ad787d26413b688 100644 (file)
--- a/include/configs/omap1610inn.h
+++ b/include/configs/omap1610inn.h
@@ -34,6 +34,7 @@
 #define CONFIG_OMAP    1                       /* in a TI OMAP core    */
 #define CONFIG_OMAP1610        1               /* which is in a 1610  */
 #define CONFIG_INNOVATOROMAP1610       1       /*  a Innovator Board  */
+#define CONFIG_MACH_OMAP_INNOVATOR     /* Select board mach-type */
 
 /* input clock of PLL */
 /* the OMAP1610 Innovator has 12MHz input clock */
@@ -50,6 +51,7 @@
  * Size of malloc() pool
  */
 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE      128     /* size in bytes reserved for initial data */
 
 /*
  * Hardware drivers
@@ -66,14 +68,13 @@
 #define CFG_NS16550
 #define CFG_NS16550_SERIAL
 #define CFG_NS16550_REG_SIZE   (-4)
-#define CFG_NS16550_CLK        (48000000)      /* can be 12M/32Khz or 48Mhz */
-#define CFG_NS16550_COM1       0xfffb0000      /* uart1, bluetooth uart
-                                               on helen */
+#define CFG_NS16550_CLK                (48000000)      /* can be 12M/32Khz or 48Mhz */
+#define CFG_NS16550_COM1       0xfffb0000      /* uart1, bluetooth uart on helen */
 
 /*
  * select serial console configuration
  */
-#define CONFIG_SERIAL1 1       /* we use SERIAL 1 on OMAP1610 Innovator */
+#define CONFIG_SERIAL1         1               /* we use SERIAL 1 on OMAP1610 Innovator */
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
@@ -81,11 +82,24 @@
 #define CONFIG_BAUDRATE        115200
 #define CFG_BAUDRATE_TABLE     { 9600, 19200, 38400, 57600, 115200 }
 
-#define CONFIG_COMMANDS        (CONFIG_CMD_DFL | CFG_CMD_DHCP)
-#define CONFIG_BOOTP_MASK      CONFIG_BOOTP_DEFAULT
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+
 #include <configs/omap1510.h>
 
 #define CONFIG_BOOTDELAY       3
@@ -97,7 +111,7 @@
 #define CONFIG_SERVERIP        156.117.97.139  /* current IP of my dev pc */
 #define CONFIG_BOOTFILE        "uImage"        /* file to load */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   115200  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  1       /* which serial port to use */
 #endif
@@ -141,13 +155,29 @@
 /*-----------------------------------------------------------------------
  * Physical Memory Map
  */
-#define CONFIG_NR_DRAM_BANKS   1       /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1   0x10000000      /* SDRAM Bank #1 */
+#define CONFIG_NR_DRAM_BANKS   1               /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1           0x10000000      /* SDRAM Bank #1 */
 #define PHYS_SDRAM_1_SIZE      0x02000000      /* 32 MB */
 
-#define PHYS_FLASH_1   0x00000000      /* Flash Bank #1 */
+#define PHYS_FLASH_1_BM1       0x00000000      /* Flash Bank #1 if booting from flash */
+#define PHYS_FLASH_1_BM0       0x0C000000      /* Flash Bank #1 if booting from RAM */
 
-#define CFG_FLASH_BASE PHYS_FLASH_1
+#ifdef CONFIG_CS_AUTOBOOT                      /* Determine CS assignment in runtime */
+
+#ifndef __ASSEMBLY__
+extern unsigned long omap_flash_base;          /* set in flash__init */
+#endif
+#define CFG_FLASH_BASE         omap_flash_base
+
+#elif defined(CONFIG_CS0_BOOT)
+
+#define CFG_FLASH_BASE         PHYS_FLASH_1_BM0
+
+#else
+
+#define CFG_FLASH_BASE         PHYS_FLASH_1_BM1
+
+#endif
 
 /*-----------------------------------------------------------------------
  * FLASH and environment organization