]> git.sur5r.net Git - u-boot/blobdiff - include/configs/omap3_beagle.h
OMAP3: BeagleBoard: add xM rev B to ID table
[u-boot] / include / configs / omap3_beagle.h
index 1c9a0075b829b049ee5319998e677bfb0d44b846..2bf6c3a285709486d9849fb8e058913cfd3aaf86 100644 (file)
 #define CONFIG_OMAP_HSMMC              1
 #define CONFIG_DOS_PARTITION           1
 
+/* Status LED */
+#define CONFIG_STATUS_LED              1
+#define CONFIG_BOARD_SPECIFIC_LED      1
+#define STATUS_LED_BIT                 0x01
+#define STATUS_LED_STATE               STATUS_LED_ON
+#define STATUS_LED_PERIOD              (CONFIG_SYS_HZ / 2)
+#define STATUS_LED_BIT1                        0x02
+#define STATUS_LED_STATE1              STATUS_LED_ON
+#define STATUS_LED_PERIOD1             (CONFIG_SYS_HZ / 2)
+#define STATUS_LED_BOOT                        STATUS_LED_BIT
+#define STATUS_LED_GREEN               STATUS_LED_BIT1
+
 /* DDR - I use Micron DDR */
 #define CONFIG_OMAP3_MICRON_DDR                1
 
 #define CONFIG_CMD_I2C         /* I2C serial bus support       */
 #define CONFIG_CMD_MMC         /* MMC support                  */
 #define CONFIG_CMD_NAND                /* NAND support                 */
+#define CONFIG_CMD_LED         /* LED support                  */
 
 #undef CONFIG_CMD_FLASH                /* flinfo, erase, protect       */
 #undef CONFIG_CMD_FPGA         /* FPGA configuration Support   */
 #define CONFIG_SYS_I2C_SLAVE           1
 #define CONFIG_SYS_I2C_BUS             0
 #define CONFIG_SYS_I2C_BUS_SELECT      1
+#define CONFIG_I2C_MULTI_BUS           1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 /*
        "loadaddr=0x82000000\0" \
        "usbtty=cdc_acm\0" \
        "console=ttyS2,115200n8\0" \
-       "mpurate=500\0" \
+       "mpurate=auto\0" \
        "vram=12M\0" \
        "dvimode=1024x768MR-16@60\0" \
        "defaultdisplay=dvi\0" \
                "omapdss.def_disp=${defaultdisplay} " \
                "root=${nandroot} " \
                "rootfstype=${nandrootfstype}\0" \
-       "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
-       "bootscript=echo Running bootscript from mmc ...; " \
-               "source ${loadaddr}\0" \
+       "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
+       "importbootenv=echo Importing environment from mmc ...; " \
+               "env import -t $loadaddr $filesize\0" \
        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
        "mmcboot=echo Booting from mmc ...; " \
                "run mmcargs; " \
 
 #define CONFIG_BOOTCOMMAND \
        "if mmc rescan ${mmcdev}; then " \
-               "if run loadbootscript; then " \
-                       "run bootscript; " \
-               "else " \
-                       "if run loaduimage; then " \
-                               "run mmcboot; " \
-                       "else run nandboot; " \
-                       "fi; " \
-               "fi; " \
-       "else run nandboot; fi"
+               "echo SD/MMC found on device ${mmcdev};" \
+               "if run loadbootenv; then " \
+                       "run importbootenv;" \
+               "fi;" \
+               "if test -n $uenvcmd; then " \
+                       "echo Running uenvcmd ...;" \
+                       "run uenvcmd;" \
+               "fi;" \
+               "if run loaduimage; then " \
+                       "run mmcboot;" \
+               "fi;" \
+       "fi;" \
+       "run nandboot;" \
 
 #define CONFIG_AUTO_COMPLETE           1
 /*
 #define PISMO1_NAND_SIZE               GPMC_SIZE_128M
 #define PISMO1_ONEN_SIZE               GPMC_SIZE_128M
 
-#define CONFIG_SYS_MAX_FLASH_SECT      520     /* max number of sectors on */
-                                               /* one chip */
-#define CONFIG_SYS_MAX_FLASH_BANKS     2       /* max number of flash banks */
 #define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 2 sectors */
 
 #define CONFIG_SYS_FLASH_BASE          boot_flash_base
 #define CONFIG_ENV_OFFSET              boot_flash_off
 #define CONFIG_ENV_ADDR                        SMNAND_ENV_OFFSET
 
-/*-----------------------------------------------------------------------
- * CFI FLASH driver setup
- */
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    (100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT    (100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS       (CONFIG_SYS_MAX_FLASH_BANKS + \
-                                       CONFIG_SYS_MAX_NAND_DEVICE)
-#define CONFIG_SYS_JFFS2_MEM_NAND
-/* use flash_info[2] */
-#define CONFIG_SYS_JFFS2_FIRST_BANK    CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS     1
-
 #ifndef __ASSEMBLY__
 extern unsigned int boot_flash_base;
 extern volatile unsigned int boot_flash_env_addr;
@@ -345,8 +345,13 @@ extern unsigned int boot_flash_sec;
 extern unsigned int boot_flash_type;
 #endif
 
-/* additions for new relocation code, must be added to all boards */
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR                (LOW_LEVEL_SRAM_STACK - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_ADDR       0x4020f800
+#define CONFIG_SYS_INIT_RAM_SIZE       0x800
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - \
+                                        GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_OMAP3_SPI
 
 #endif /* __CONFIG_H */