85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN

[u-boot] / include / configs / omap3_zoom2.h

diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h
index 03f92f58e75a6b1ad7389b1646835e6973b23278..73779331ce98def3e53b5c9c7f96a0a5acdbf43a 100644 (file)
--- a/include/configs/omap3_zoom2.h
+++ b/include/configs/omap3_zoom2.h
@@ -29,17 +29,18 @@
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
-#include <asm/sizes.h>
 
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMCORTEXA8     1       /* This is an ARM V7 CPU core */
+#define CONFIG_ARMV7           1       /* This is an ARM V7 CPU core */
 #define CONFIG_OMAP            1       /* in a TI OMAP core */
 #define CONFIG_OMAP34XX                1       /* which is a 34XX */
 #define CONFIG_OMAP3430                1       /* which is in a 3430 */
 #define CONFIG_OMAP3_ZOOM2     1       /* working with Zoom II */
 
+#define CONFIG_SDRC    /* The chip has SDRC controller */
+
 #include <asm/arch/cpu.h>      /* get chip and board defs */
 #include <asm/arch/omap3.h>
 
@@ -64,10 +65,9 @@
 /*
  * Size of malloc() pool
  */
-#define CONFIG_ENV_SIZE                        SZ_128K /* Total Size Environment */
+#define CONFIG_ENV_SIZE                        (128 << 10)     /* 128 KiB */
                                                /* Sector */
-#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + SZ_128K)
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* bytes reserved for */
+#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (128 << 10))
                                                /* initial data */
 /*
  * Hardware drivers
@@ -99,6 +99,9 @@
 #define CONFIG_OMAP3_MMC               1
 #define CONFIG_DOS_PARTITION           1
 
+/* DDR - I use Micron DDR */
+#define CONFIG_OMAP3_MICRON_DDR                1
+
 /* Status LED */
 #define CONFIG_STATUS_LED              1 /* Status LED enabled */
 #define CONFIG_BOARD_SPECIFIC_LED      1
@@ -123,6 +126,20 @@
 #define CONFIG_OMAP3_GPIO_3 /* board revision */
 #define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */
 
+/* USB */
+#define CONFIG_MUSB_UDC                        1
+#define CONFIG_USB_OMAP3               1
+#define CONFIG_TWL4030_USB             1
+
+/* USB device configuration */
+#define CONFIG_USB_DEVICE              1
+#define CONFIG_USB_TTY                 1
+/* Change these to suit your needs */
+#define CONFIG_USBD_VENDORID           0x0451
+#define CONFIG_USBD_PRODUCTID          0x5678
+#define CONFIG_USBD_MANUFACTURER       "Texas Instruments"
+#define CONFIG_USBD_PRODUCT_NAME       "Zoom2"
+
 /* commands to include */
 #include <config_cmd_default.h>
 
@@ -140,6 +157,7 @@
 #undef CONFIG_CMD_NFS                  /* NFS support                  */
 
 #define CONFIG_SYS_NO_FLASH
+#define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
 #define CONFIG_SYS_I2C_BUS             0
@@ -164,11 +182,18 @@
 #define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 
-#define CONFIG_SYS_64BIT_VSPRINTF              /* needed for nand_util.c */
-
 /* Environment information */
 #define CONFIG_BOOTDELAY               10
 
+#define CONFIG_EXTRA_ENV_SETTINGS \
+       "usbtty=cdc_acm\0" \
+
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR       0x4020f800
+#define CONFIG_SYS_INIT_RAM_SIZE       0x800
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - \
+                                        GENERATED_GBL_DATA_SIZE)
 /*
  * Miscellaneous configurable options
  */
@@ -200,10 +225,10 @@
  *
  * The stack sizes are set up in start.S using these settings
  */
-#define CONFIG_STACKSIZE       SZ_128K
+#define CONFIG_STACKSIZE       (128 << 10)     /* regular stack 128 KiB */
 #ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ   SZ_4K
-#define CONFIG_STACKSIZE_FIQ   SZ_4K
+#define CONFIG_STACKSIZE_IRQ   (4 << 10)       /* IRQ stack 4 KiB */
+#define CONFIG_STACKSIZE_FIQ   (4 << 10)       /* FIQ stack 4 KiB */
 #endif
 
 /*-----------------------------------------------------------------------
@@ -211,7 +236,7 @@
  */
 #define CONFIG_NR_DRAM_BANKS   2       /* CS1 may or may not be populated */
 #define PHYS_SDRAM_1           OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE      SZ_32M  /* at least 32 meg */
+#define PHYS_SDRAM_1_SIZE      (32 << 20)      /* at least 32 MiB */
 #define PHYS_SDRAM_2           OMAP34XX_SDRC_CS1
 
 /* SDRAM Bank Allocation method */
@@ -227,10 +252,7 @@
 #define PISMO1_NAND_SIZE               GPMC_SIZE_128M
 #define PISMO1_ONEN_SIZE               GPMC_SIZE_128M
 
-#define CONFIG_SYS_MAX_FLASH_SECT      520     /* max number of sectors on */
-                                               /* one chip */
-#define CONFIG_SYS_MAX_FLASH_BANKS     2       /* max number of flash banks */
-#define CONFIG_SYS_MONITOR_LEN         SZ_256K /* Reserve 2 sectors */
+#define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 2 sectors */
 
 #define CONFIG_SYS_FLASH_BASE          boot_flash_base
 
@@ -244,15 +266,7 @@
 #define CONFIG_ENV_OFFSET              boot_flash_off
 #define CONFIG_ENV_ADDR                        SMNAND_ENV_OFFSET
 
-/*-----------------------------------------------------------------------
- * CFI FLASH driver setup
- */
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    (100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT    (100 * CONFIG_SYS_HZ)
-
 #ifndef __ASSEMBLY__
-extern struct gpmc *gpmc_cfg;
 extern unsigned int boot_flash_base;
 extern volatile unsigned int boot_flash_env_addr;
 extern unsigned int boot_flash_off;