OMAP3: Fix timer handling to 1ms and CONFIG_SYS_HZ to 1000

[u-boot] / include / configs / pxa255_idp.h

diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index f81103b795994a4a76eb32d4096b78649dd0b192..7485f7241ce1c48dee93d417a51d0ee0eb85156d 100644 (file)
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -68,6 +68,9 @@
 
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
 /*
  * Size of malloc() pool
  */
@@ -119,7 +122,6 @@
  */
 #include <config_cmd_default.h>
 
-#define CONFIG_CMD_MMC
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_DHCP
 
@@ -237,11 +239,9 @@
 #define CONFIG_SYS_MEMTEST_START       0xa0400000      /* memtest works on     */
 #define CONFIG_SYS_MEMTEST_END         0xa0800000      /* 4 ... 8 MB in DRAM   */
 
-#undef CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR           0xa0800000      /* default load address */
 
-#define CONFIG_SYS_HZ                  3686400         /* incrementer freq: 3.6864 MHz */
+#define CONFIG_SYS_HZ                  1000
 #define CONFIG_SYS_CPUSPEED            0x161           /* set core clock to 400/200/100 MHz */
 
 #define RTC    1                               /* enable 32KHz osc */
@@ -249,7 +249,11 @@
                                                /* valid baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 
+#ifdef CONFIG_MMC
+#define CONFIG_PXA_MMC
+#define CONFIG_CMD_MMC
 #define CONFIG_SYS_MMC_BASE            0xF0000000
+#endif
 
 /*
  * Stack sizes