fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo features

[u-boot] / include / configs / rd6281a.h

diff --git a/include/configs/rd6281a.h b/include/configs/rd6281a.h
index 3f4d42c51b142f801b4ed7843dfbda4359e609b2..585730111f1269f15e573c3ef688b5498a8191c7 100644 (file)
--- a/include/configs/rd6281a.h
+++ b/include/configs/rd6281a.h
@@ -107,7 +107,6 @@
 #define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_NAND_BASE           0xD8000000      /* KW_DEFADR_NANDF */
 #define NAND_ALLOW_ERASE_ALL           1
-#define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */
 #endif
 
 /*
@@ -172,8 +171,8 @@
 #define CONFIG_NETCONSOLE      /* include NetConsole support */
 #define CONFIG_NET_MULTI       /* specify more that one ports available */
 #define CONFIG_MII             /* expose smi ove miiphy interface */
-#define CONFIG_KIRKWOOD_EGIGA  /* Enable kirkwood Gbe Controller Driver */
-#define CONFIG_KIRKWOOD_EGIGA_PORTS    {1,1}   /* enable both ports */
+#define CONFIG_MVGBE           /* Enable Marvell Gbe Controller Driver */
+#define CONFIG_MVGBE_PORTS     {1, 1}  /* enable both ports */
 #define CONFIG_MV88E61XX_MULTICHIP_ADRMODE
 #define CONFIG_DIS_AUTO_NEG_SPEED_GMII /*Disable Auto speed negociation */
 #define CONFIG_PHY_SPEED       _1000BASET      /*Force PHYspeed to 1GBPs */