rockchip: Drop SPL GPIO support for rk3288

[u-boot] / include / configs / rk3288_common.h

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 36408b99e2c9025eaeb9ba891fc25186a93315ad..9d50d834db493340da8fff90941ab153a161c9e3 100644 (file)
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -7,56 +7,56 @@
 #ifndef __CONFIG_RK3288_COMMON_H
 #define __CONFIG_RK3288_COMMON_H
 
+#define CONFIG_SYS_CACHELINE_SIZE      64
+
 #include <asm/arch/hardware.h>
 
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_NR_DRAM_BANKS           1
-#define CONFIG_ENV_IS_NOWHERE
 #define CONFIG_ENV_SIZE                        0x2000
 #define CONFIG_SYS_MAXARGS             16
 #define CONFIG_BAUDRATE                        115200
 #define CONFIG_SYS_MALLOC_LEN          (32 << 20)
 #define CONFIG_SYS_CBSIZE              1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_THUMB_BUILD
-#define CONFIG_OF_LIBFDT
 #define CONFIG_DISPLAY_BOARDINFO
 
 #define CONFIG_SYS_TIMER_RATE          (24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_COUNTER       (TIMER7_BASE + 8)
+#define        CONFIG_SYS_TIMER_BASE           0xff810020 /* TIMER7 */
+#define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 8)
 
 #define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_SPL_BOARD_INIT
 
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MALLOC_SIMPLE
-#endif
-
 #define CONFIG_SYS_TEXT_BASE           0x00100000
 #define CONFIG_SYS_INIT_SP_ADDR                0x00100000
 #define CONFIG_SYS_LOAD_ADDR           0x00800800
 #define CONFIG_SPL_STACK               0xff718000
 #define CONFIG_SPL_TEXT_BASE           0xff704004
 
+#define CONFIG_ROCKCHIP_COMMON
+#define CONFIG_SPL_ROCKCHIP_COMMON
+
+#define CONFIG_SILENT_CONSOLE
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_SYS_CONSOLE_IS_IN_ENV
+# define CONFIG_CONSOLE_MUX
+#endif
+
 /* MMC/SD IP block */
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
-#define CONFIG_CMD_MMC
 #define CONFIG_SDHCI
 #define CONFIG_DWMMC
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_FAT
 #define CONFIG_FAT_WRITE
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_EXT4
-#define CONFIG_CMD_FS_GENERIC
 #define CONFIG_PARTITION_UUIDS
 #define CONFIG_CMD_PART
 
@@ -69,26 +69,17 @@
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME                "u-boot.img"
 
 #define CONFIG_SPL_PINCTRL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
 #define CONFIG_SPL_RAM_SUPPORT
 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
 
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_TIME
-
 #define CONFIG_SYS_SDRAM_BASE          0
 #define CONFIG_NR_DRAM_BANKS           1
 #define SDRAM_BANK_SIZE                        (2UL << 30)
 
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI
-#define CONFIG_CMD_SF
-#define CONFIG_CMD_SPI
-#define CONFIG_SPI_FLASH_GIGADEVICE
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
-#define CONFIG_CMD_I2C
-
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
@@ -110,7 +101,9 @@
  * limit the fdt reallocation to that */
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "fdt_high=0x1fffffff\0" \
+       "initrd_high=0x1fffffff\0" \
        ENV_MEM_LAYOUT_SETTINGS \
+       ROCKCHIP_DEVICE_SETTINGS \
        BOOTENV
 #endif