mpc8313erdb: Enable NAND in config.

[u-boot] / include / configs / sc3.h

diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index 578ef80aa62b66f0f146fa1a0395459b0f974c52..87311ea6c7af0200894ed4edbc70f668c52fd122 100644 (file)
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -68,8 +68,7 @@
  * Define IDE_USES_ISA_EMULATION for slower IDE access in the ISA-IO address range
  * If undefined, IDE access uses a seperat emulation with higher access speed.
  * Consider to inform your Linux IDE driver about the different addresses!
- * IDE_USES_ISA_EMULATION is only used if your CONFIG_COMMANDS macro includes
- * the CFG_CMD_IDE macro!
+ * IDE_USES_ISA_EMULATION is only used if you define CONFIG_CMD_IDE!
  */
 #define IDE_USES_ISA_EMULATION
 
@@ -98,7 +97,7 @@
 #define CONFIG_BOOTDELAY       3 /* autoboot after 3 seconds         */
 
 #define CONFIG_PREBOOT "echo;" \
-       "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+       "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
        "echo"
 
 #undef CONFIG_BOOTARGS
@@ -133,7 +132,8 @@
 
 #if 1  /* feel free to disable for development */
 #define CONFIG_AUTOBOOT_KEYED          /* Enable password protection   */
-#define CONFIG_AUTOBOOT_PROMPT         "\nSC3 - booting... stop with ENTER\n"
+#define CONFIG_AUTOBOOT_PROMPT         \
+       "\nSC3 - booting... stop with ENTER\n"
 #define CONFIG_AUTOBOOT_DELAY_STR      "\r"    /* 1st "password"       */
 #define CONFIG_AUTOBOOT_DELAY_STR2     "\n"    /* 1st "password"       */
 #endif
@@ -169,6 +169,15 @@
 #define CONFIG_MII 1                   /* add 405GP MII PHY management         */
 #define CONFIG_PHY_ADDR 1      /* the connected Phy defaults to address 1 */
 
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
 /*
  * Command line configuration.
  */
@@ -425,24 +434,6 @@ extern unsigned long offsetOfEnvironment;
 #define CONFIG_JFFS2_PART_SIZE         0x01000000
 #define CONFIG_JFFS2_PART_OFFSET       0x00000000
 
-/*-----------------------------------------------------------------------
- * Cache Configuration
- *
- * CFG_DCACHE_SIZE -> size of data cache:
- * - 405GP 8k
- * - 405GPr 16k
- * How to handle the difference in chache size?
- * CFG_CACHELINE_SIZE -> size of one cache line: 32 bytes
- * (used in cpu/ppc4xx/start.S)
-*/
-#define CFG_DCACHE_SIZE    16384
-
-#define CFG_CACHELINE_SIZE 32
-
-#if defined(CONFIG_CMD_KGDB)
- #define CFG_CACHELINE_SHIFT   5       /* log base 2 of the above value        */
-#endif
-
 /*
  * Init Memory Controller:
  *