]> git.sur5r.net Git - u-boot/blobdiff - include/configs/seaboard.h
microblaze: Enable TFTP put command
[u-boot] / include / configs / seaboard.h
index 06ce3e2b7c88d969cce0cd6baaed06f0c2fed15c..261f9521add4d8e3153106c19d5fe240f09fda8d 100644 (file)
 #define CONFIG_TEGRA2_ENABLE_UARTD
 #define CONFIG_SYS_NS16550_COM1                NV_PA_APB_UARTD_BASE
 
+/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
+#define CONFIG_UART_DISABLE_GPIO       GPIO_PI3
+
 #define CONFIG_MACH_TYPE               MACH_TYPE_SEABOARD
 #define CONFIG_SYS_BOARD_ODMDATA       0x300d8011 /* lp1, 1GB */
 
 #define CONFIG_BOARD_EARLY_INIT_F
+
+/* SPI */
+#define CONFIG_TEGRA2_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH_SIZE          (4 << 20)
+
+/* SD/MMC */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_TEGRA2_MMC
+#define CONFIG_CMD_MMC
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
+/* Environment in SPI */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_MAX_HZ          48000000
+#define CONFIG_ENV_SPI_MODE            SPI_MODE_0
+
+#define CONFIG_ENV_SECT_SIZE    CONFIG_ENV_SIZE
+#define CONFIG_ENV_OFFSET       (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE)
 #endif /* __CONFIG_H */