Merge branch 'master' of git://git.denx.de/u-boot-fdt

[u-boot] / include / configs / socfpga_common.h

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index c4ac94d0eb302ec6c64193fc99f109f069b00de8..6d9347204b225a89a444e6ac84837dc654681efe 100644 (file)
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -19,8 +19,7 @@
  * High level configuration
  */
 #define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_BOARDINFO_LATE
 #define CONFIG_ARCH_EARLY_INIT_R
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_CLOCKS
@@ -139,7 +138,7 @@
 #define CONFIG_DESIGNWARE_WATCHDOG
 #define CONFIG_DW_WDT_BASE             SOCFPGA_L4WD0_ADDRESS
 #define CONFIG_DW_WDT_CLOCK_KHZ                25000
-#define CONFIG_HW_WATCHDOG_TIMEOUT_MS  12000
+#define CONFIG_HW_WATCHDOG_TIMEOUT_MS  30000
 #endif
 
 /*
@@ -159,7 +158,7 @@
 #define CONFIG_SYS_MMC_MAX_BLK_COUNT   256     /* FIXME -- SPL only? */
 #endif
 
- /*
+/*
  * I2C support
  */
 #define CONFIG_SYS_I2C
@@ -186,6 +185,30 @@ unsigned int cm_get_l4_sp_clk_hz(void);
 #endif
 #define CONFIG_CMD_I2C
 
+/*
+ * QSPI support
+ */
+#ifdef CONFIG_OF_CONTROL       /* QSPI is controlled via DT */
+#define CONFIG_CADENCE_QSPI
+/* Enable multiple SPI NOR flash manufacturers */
+#define CONFIG_SPI_FLASH               /* SPI flash subsystem */
+#define CONFIG_SPI_FLASH_STMICRO       /* Micron/Numonyx flash */
+#define CONFIG_SPI_FLASH_SPANSION      /* Spansion flash */
+#define CONFIG_SPI_FLASH_MTD
+/* QSPI reference clock */
+#ifndef __ASSEMBLY__
+unsigned int cm_get_qspi_controller_clk_hz(void);
+#define CONFIG_CQSPI_REF_CLK           cm_get_qspi_controller_clk_hz()
+#endif
+#define CONFIG_CQSPI_DECODER           0
+#define CONFIG_CMD_SF
+#endif
+
+#ifdef CONFIG_OF_CONTROL       /* DW SPI is controlled via DT */
+#define CONFIG_DESIGNWARE_SPI
+#define CONFIG_CMD_SPI
+#endif
+
 /*
  * Serial Driver
  */