Merge git://git.denx.de/u-boot-socfpga

[u-boot] / include / configs / socfpga_common.h

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 175b01ef84a9f12565b3d29529b30cbdcb9becd8..d343a6ec0a32907ac85c608a1515c2c44f7a9635 100644 (file)
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -54,8 +54,6 @@
  */
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_CBSIZE      1024            /* Console I/O buffer size */
-#define CONFIG_SYS_PBSIZE      \
-       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
                                                /* Print buffer size */
 #define CONFIG_SYS_MAXARGS     32              /* Max number of command args */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE
@@ -67,9 +65,6 @@
 #define CONFIG_SYS_HOSTNAME    CONFIG_SYS_BOARD
 #endif
 
-#define CONFIG_CMD_PXE
-#define CONFIG_MENU
-
 /*
  * Cache
  */
@@ -96,7 +91,6 @@
 #if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
 #define CONFIG_DW_ALTDESCRIPTOR
 #define CONFIG_MII
-#define CONFIG_AUTONEG_TIMEOUT         (15 * CONFIG_SYS_HZ)
 #endif
 
 /*
@@ -144,19 +138,15 @@
  */
 #ifdef CONFIG_NAND_DENALI
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_MAX_CHIPS      1
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_NAND_DENALI_ECC_SIZE    512
 #define CONFIG_SYS_NAND_REGS_BASE      SOCFPGA_NANDREGS_ADDRESS
 #define CONFIG_SYS_NAND_DATA_BASE      SOCFPGA_NANDDATA_ADDRESS
-#define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_DATA_BASE + 0x10)
 #endif
 
 /*
  * I2C support
  */
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_BUS_MAX         4
 #define CONFIG_SYS_I2C_BASE            SOCFPGA_I2C0_ADDRESS
 #define CONFIG_SYS_I2C_BASE1           SOCFPGA_I2C1_ADDRESS
 #define CONFIG_SYS_I2C_BASE2           SOCFPGA_I2C2_ADDRESS
@@ -185,15 +175,12 @@ unsigned int cm_get_l4_sp_clk_hz(void);
 #define CONFIG_SPI_FLASH_MTD
 #define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT                 "nor0=ff705000.spi.0"
 #endif
 /* QSPI reference clock */
 #ifndef __ASSEMBLY__
 unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_CQSPI_REF_CLK           cm_get_qspi_controller_clk_hz()
 #endif
-#define CONFIG_CQSPI_DECODER           0
-#define CONFIG_BOUNCE_BUFFER
 
 /*
  * Designware SPI support
@@ -265,15 +252,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
  * 5: rootfs              0x01000000      0x01000000      0
  *
  */
-#if defined(CONFIG_CMD_SF) && !defined(MTDPARTS_DEFAULT)
-#define MTDPARTS_DEFAULT       "mtdparts=ff705000.spi.0:"\
-                               "1m(u-boot),"           \
-                               "256k(env1),"           \
-                               "256k(env2),"           \
-                               "14848k(boot),"         \
-                               "16m(rootfs),"          \
-                               "-@1536k(UBI)\0"
-#endif
 
 /*
  * SPL
@@ -310,7 +288,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 
 /* SPL NAND boot support */
 #ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #endif
@@ -324,6 +301,12 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
+#ifdef CONFIG_CMD_DHCP
+#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
+#else
+#define BOOT_TARGET_DEVICES_DHCP(func)
+#endif
+
 #ifdef CONFIG_CMD_PXE
 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
 #else
@@ -339,7 +322,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define BOOT_TARGET_DEVICES(func) \
        BOOT_TARGET_DEVICES_MMC(func) \
        BOOT_TARGET_DEVICES_PXE(func) \
-       func(DHCP, dhcp, na)
+       BOOT_TARGET_DEVICES_DHCP(func)
 
 #include <config_distro_bootcmd.h>