Merge git://git.denx.de/u-boot-socfpga

[u-boot] / include / configs / socfpga_common.h

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index dc75dce74b79d6bb4a185c219f30b69016e1e155..d343a6ec0a32907ac85c608a1515c2c44f7a9635 100644 (file)
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -65,9 +65,6 @@
 #define CONFIG_SYS_HOSTNAME    CONFIG_SYS_BOARD
 #endif
 
-#define CONFIG_CMD_PXE
-#define CONFIG_MENU
-
 /*
  * Cache
  */
@@ -184,8 +181,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
 unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_CQSPI_REF_CLK           cm_get_qspi_controller_clk_hz()
 #endif
-#define CONFIG_CQSPI_DECODER           0
-#define CONFIG_BOUNCE_BUFFER
 
 /*
  * Designware SPI support
@@ -293,7 +288,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 
 /* SPL NAND boot support */
 #ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #endif
@@ -307,6 +301,12 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
+#ifdef CONFIG_CMD_DHCP
+#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
+#else
+#define BOOT_TARGET_DEVICES_DHCP(func)
+#endif
+
 #ifdef CONFIG_CMD_PXE
 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
 #else
@@ -322,7 +322,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define BOOT_TARGET_DEVICES(func) \
        BOOT_TARGET_DEVICES_MMC(func) \
        BOOT_TARGET_DEVICES_PXE(func) \
-       func(DHCP, dhcp, na)
+       BOOT_TARGET_DEVICES_DHCP(func)
 
 #include <config_distro_bootcmd.h>