]> git.sur5r.net Git - u-boot/blobdiff - include/configs/socfpga_cyclone5.h
ppc4xx: remove PMC405 board
[u-boot] / include / configs / socfpga_cyclone5.h
index 34d9cf61346dfe23e0dcc594dad484c5d7ee095c..c3d958cb3077ddf1211c8aa57efd46edfcbfaf94 100644 (file)
@@ -26,6 +26,7 @@
 #define CONFIG_CMD_EXT4_WRITE
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_FPGA
+#define CONFIG_CMD_FS_GENERIC
 #define CONFIG_CMD_GREPENV
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_MMC
@@ -41,7 +42,7 @@
 /* Booting Linux */
 #define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "zImage"
-#define CONFIG_BOOTARGS                "console=ttyS0" __stringify(CONFIG_BAUDRATE)
+#define CONFIG_BOOTARGS                "console=ttyS0," __stringify(CONFIG_BAUDRATE)
 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
 #define CONFIG_BOOTCOMMAND     "run ramboot"
 #else
 
 /* Ethernet on SoC (EMAC) */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_EMAC_BASE               SOCFPGA_EMAC0_ADDRESS
+#define CONFIG_EMAC_BASE               SOCFPGA_EMAC1_ADDRESS
 #define CONFIG_PHY_INTERFACE_MODE      PHY_INTERFACE_MODE_RGMII
-#define CONFIG_EPHY0_PHY_ADDR          0
 
 /* PHY */
-#define CONFIG_EPHY1_PHY_ADDR          4
 #define CONFIG_PHY_MICREL
 #define CONFIG_PHY_MICREL_KSZ9021
 #define CONFIG_KSZ9021_CLK_SKEW_ENV    "micrel-ksz9021-clk-skew"
@@ -85,8 +84,8 @@
                " root=${mmcroot} rw rootwait;" \
                "bootz ${loadaddr} - ${fdt_addr}\0" \
        "mmcload=mmc rescan;" \
-               "fatload mmc 0:1 ${loadaddr} ${bootimage};" \
-               "fatload mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+               "load mmc 0:1 ${loadaddr} ${bootimage};" \
+               "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
        "qspiroot=/dev/mtdblock0\0" \
        "qspirootfstype=jffs2\0" \
        "qspiboot=setenv bootargs " CONFIG_BOOTARGS \