microblaze: Enable TFTP put command

[u-boot] / include / configs / spear-common.h

diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index cc52e39ffb6cc082763ffe8d61410eb27e654f92..55d19b5ce3f4cc88b4a343ab80d6dda047fded6d 100644 (file)
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -86,6 +86,8 @@
 #define CONFIG_SYS_LOADS_BAUD_CHANGE
 
 /* NAND FLASH Configuration */
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
 #define CONFIG_NAND_SPEAR                      1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_MTD_NAND_VERIFY_WRITE           1
@@ -181,7 +183,6 @@
 #define CONFIG_SYS_MEMTEST_START               0x00800000
 #define CONFIG_SYS_MEMTEST_END                 0x04000000
 #define CONFIG_SYS_MALLOC_LEN                  (1024*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE               128
 #define CONFIG_IDENT_STRING                    "-SPEAr"
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_PROMPT                      "u-boot> "
@@ -210,4 +211,14 @@
 #define PHYS_SDRAM_1                           0x00000000
 #define PHYS_SDRAM_1_MAXSIZE                   0x40000000
 
+#define CONFIG_SYS_SDRAM_BASE                  PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR               0xD2800000
+#define CONFIG_SYS_INIT_RAM_SIZE               0x2000
+
+#define CONFIG_SYS_INIT_SP_OFFSET              \
+       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_INIT_SP_ADDR                        \
+       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
 #endif