]> git.sur5r.net Git - u-boot/blobdiff - include/configs/sunxi-common.h
sunxi: Fix reset hang on sun5i
[u-boot] / include / configs / sunxi-common.h
index 42534521d6602e4cfd7251f81f6819053d800389..40833885f71bff007634a5b7fe025c4c4c3fd492 100644 (file)
  * High Level Configuration Options
  */
 #define CONFIG_SUNXI           /* sunxi family */
+#ifdef CONFIG_SPL_BUILD
+#ifndef CONFIG_SPL_FEL
+#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
+#endif
+#endif
 
 #include <asm/arch/cpu.h>      /* get chip and board defs */
 
@@ -65,7 +70,6 @@
 #define CONFIG_CMD_MMC
 #define CONFIG_MMC_SUNXI
 #define CONFIG_MMC_SUNXI_SLOT          0
-#define CONFIG_MMC_SUNXI_USE_DMA
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV         0       /* first detected MMC controller */
 
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 
+#ifdef CONFIG_SPL_FEL
+
 #define CONFIG_SPL
 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
 #define CONFIG_SPL_TEXT_BASE           0x2000
 #define CONFIG_SPL_MAX_SIZE            0x4000          /* 16 KiB */
+
+#else /* CONFIG_SPL */
+
+#define CONFIG_SPL_BSS_START_ADDR      0x4ff80000
+#define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KiB */
+
+#define CONFIG_SPL_TEXT_BASE           0x20            /* sram start+header */
+#define CONFIG_SPL_MAX_SIZE            0x5fe0          /* 24KB on sun4i/sun7i */
+
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+
+#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        80      /* 40KiB */
+#define CONFIG_SPL_PAD_TO              32768           /* decimal for 'dd' */
+
+#endif /* CONFIG_SPL */
+
 /* end of 32 KiB in sram */
 #define LOW_LEVEL_SRAM_STACK           0x00008000 /* End of sram */
 #define CONFIG_SPL_STACK               LOW_LEVEL_SRAM_STACK
 #undef CONFIG_CMD_NET
 #undef CONFIG_CMD_NFS
 
+/* I2C */
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_SYS_I2C_SPEED           400000
+#define CONFIG_SYS_I2C_SLAVE           0x7f
+#define CONFIG_CMD_I2C
+
+/* PMU */
+#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
+#define CONFIG_SPL_POWER_SUPPORT
+#endif
+
+#ifndef CONFIG_CONS_INDEX
 #define CONFIG_CONS_INDEX              1       /* UART0 */
+#endif
+
+/* Ethernet support */
+#ifdef CONFIG_SUNXI_EMAC
+#define CONFIG_MII                     /* MII PHY management           */
+#endif
 
 #ifdef CONFIG_SUNXI_GMAC
 #define CONFIG_DESIGNWARE_ETH          /* GMAC can use designware driver */