]> git.sur5r.net Git - u-boot/blobdiff - include/configs/ti_armv7_keystone2.h
ti_omap4_common.h: Switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIAL
[u-boot] / include / configs / ti_armv7_keystone2.h
index af89f7090f954a8b044fdebb693a5337f00bbfb4..58c98ce660c04ba15d3a9da76f0de99cb57220e2 100644 (file)
 /* U-Boot Build Configuration */
 #define CONFIG_SKIP_LOWLEVEL_INIT      /* U-Boot is a 2nd stage loader */
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
 
 /* SoC Configuration */
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_SYS_ARCH_TIMER
-#define CONFIG_SYS_TEXT_BASE           0x0c001000
+#define CONFIG_SYS_TEXT_BASE           0x0c000000
 #define CONFIG_SPL_TARGET              "u-boot-spi.gph"
 #define CONFIG_SYS_DCACHE_OFF
 
@@ -28,7 +29,7 @@
 #define CONFIG_SYS_LPAE_SDRAM_BASE     0x800000000
 #define CONFIG_MAX_RAM_BANK_SIZE       (2 << 30)       /* 2GB */
 #define CONFIG_STACKSIZE               (512 << 10)     /* 512 KiB */
-#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_TEXT_BASE - \
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SPL_TEXT_BASE - \
                                        GENERATED_GBL_DATA_SIZE)
 
 /* SPL SPI Loader Configuration */
        "init_ramfs=run args_all args_ramfs get_fs_ramfs\0"             \
        "args_ramfs=setenv bootargs ${bootargs} "                       \
                "rdinit=/sbin/init rw root=/dev/ram0 "                  \
-               "initrd=0x802000000,9M\0"                               \
+               "initrd=0x808080000,80M\0"                              \
        "no_post=1\0"                                                   \
        "mtdparts=mtdparts=davinci_nand.0:"                             \
                "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"