TI: Rework SRAM definitions and maximums

[u-boot] / include / configs / ti_omap4_common.h

diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 5fad3c1242c5b1d371c9f2b844888d52d9326aaf..8c88ebf2f032db1efc6536e925d5435405b365fb 100644 (file)
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -26,7 +26,6 @@
 #define CONFIG_SYS_L2_PL310            1
 #define CONFIG_SYS_PL310_BASE  0x48242000
 #endif
-#define CONFIG_SYS_CACHELINE_SIZE      32
 
 /* Get CPU defs */
 #include <asm/arch/cpu.h>
@@ -152,7 +151,6 @@
  * So moving TEXT_BASE down to non-HS limit.
  */
 #define CONFIG_SPL_TEXT_BASE           0x40300000
-#define CONFIG_SPL_MAX_SIZE            (0x4030C000 - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_DISPLAY_PRINT
 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
 #define CONFIG_SYS_SPL_ARGS_ADDR       (CONFIG_SYS_SDRAM_BASE + \