]> git.sur5r.net Git - u-boot/blobdiff - include/configs/trats.h
Merge branch 'master' of git://git.denx.de/u-boot-video
[u-boot] / include / configs / trats.h
index 7664a79730926c7f2dbb1d23134f6aebc31752e0..b3b5a3d5e31a0faaf8ecffb911bbcef80ec8cfee 100644 (file)
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-/* Keep L2 Cache Disabled */
-#define CONFIG_SYS_L2CACHE_OFF
+#ifndef CONFIG_SYS_L2CACHE_OFF
+#define CONFIG_SYS_L2_PL310
+#define CONFIG_SYS_PL310_BASE  0x10502000
+#endif
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define CONFIG_SYS_TEXT_BASE           0x63300000
@@ -76,6 +78,7 @@
 #define CONFIG_MMC
 #define CONFIG_S5P_SDHCI
 #define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
 
 /* PWM */
 #define CONFIG_PWM
        "meminfo=crashkernel=32M@0x50000000\0" \
        "nfsroot=/nfsroot/arm\0" \
        "bootblock=" CONFIG_BOOTBLOCK "\0" \
+       "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
        "mmcdev=0\0" \
        "mmcbootpart=2\0" \
        "mmcrootpart=3\0" \
 
 #define CONFIG_SYS_HZ                  1000
 
-/* Stack sizes */
-#define CONFIG_STACKSIZE               (256 << 10) /* regular stack 256KB */
-
 /* TRATS has 2 banks of DRAM */
 #define CONFIG_NR_DRAM_BANKS   2
 #define PHYS_SDRAM_1           CONFIG_SYS_SDRAM_BASE   /* LDDDR2 DMC 0 */
 #define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_CACHELINE_SIZE       32
 
-#include <asm/arch/gpio.h>
-/*
- * I2C Settings
- */
-#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
-#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
 
 #define CONFIG_SOFT_I2C
 #define CONFIG_SOFT_I2C_READ_REPEATED_START
+#define CONFIG_SYS_I2C_INIT_BOARD
 #define CONFIG_SYS_I2C_SPEED   50000
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS 7
+#define CONFIG_SOFT_I2C_MULTI_BUS
+#define CONFIG_SYS_MAX_I2C_BUS 15
+
+#include <asm/arch/gpio.h>
+
+/* I2C PMIC */
+#define CONFIG_SOFT_I2C_I2C5_SCL exynos4_gpio_part1_get_nr(b, 7)
+#define CONFIG_SOFT_I2C_I2C5_SDA exynos4_gpio_part1_get_nr(b, 6)
+
+/* I2C FG */
+#define CONFIG_SOFT_I2C_I2C9_SCL exynos4_gpio_part2_get_nr(y4, 1)
+#define CONFIG_SOFT_I2C_I2C9_SDA exynos4_gpio_part2_get_nr(y4, 0)
+
+#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
+#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
+#define I2C_INIT multi_i2c_init()
 
 #define CONFIG_PMIC
 #define CONFIG_PMIC_I2C