Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value

[u-boot] / include / configs / trizepsiv.h

diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h
index bfa7157214f2a12eeaf31105e8a6ed1c5c79f96e..2512f93f9c682940462f37b61f94903a2eff27be 100644 (file)
--- a/include/configs/trizepsiv.h
+++ b/include/configs/trizepsiv.h
@@ -44,6 +44,7 @@
 
 #define CONFIG_MMC             1
 #define BOARD_LATE_INIT                1
+#define        CONFIG_SYS_TEXT_BASE    0x0
 
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 
@@ -56,7 +57,6 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN      (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 
 /*
  * Hardware drivers
@@ -212,6 +212,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * GPIO settings
  */
@@ -239,11 +242,17 @@
 #define CONFIG_SYS_GRER1_VAL           0x00000000
 #define CONFIG_SYS_GRER2_VAL           0x00000000
 #define CONFIG_SYS_GRER3_VAL           0x00000000
-#define CONFIG_SYS_GFER0_VAL           0x00000000
+
 #define CONFIG_SYS_GFER1_VAL           0x00000000
-#define CONFIG_SYS_GFER2_VAL           0x00000000
 #define CONFIG_SYS_GFER3_VAL           0x00000020
 
+#if CONFIG_POLARIS
+#define CONFIG_SYS_GFER0_VAL           0x00000001
+#define CONFIG_SYS_GFER2_VAL           0x00200000
+#else
+#define CONFIG_SYS_GFER0_VAL           0x00000000
+#define CONFIG_SYS_GFER2_VAL           0x00000000
+#endif
 
 #define CONFIG_SYS_PSSR_VAL            0x20    /* CHECK */
 
@@ -259,7 +268,11 @@
 
 #define CONFIG_SYS_MSC0_VAL            0x4df84df0
 #define CONFIG_SYS_MSC1_VAL            0x7ff87ff4
+#if CONFIG_POLARIS
+#define CONFIG_SYS_MSC2_VAL            0xa2697ff8
+#else
 #define CONFIG_SYS_MSC2_VAL            0xa26936d4
+#endif
 #define CONFIG_SYS_MDCNFG_VAL          0x880009C9
 #define CONFIG_SYS_MDREFR_VAL          0x20ca201e
 #define CONFIG_SYS_MDMRS_VAL           0x00220022
@@ -280,7 +293,13 @@
 
 #define CONFIG_NET_MULTI               1
 #define CONFIG_DRIVER_DM9000           1
-#define CONFIG_DM9000_BASE     0x08000000
+
+#if CONFIG_POLARIS
+#define CONFIG_DM9000_BASE             0x0C800000
+#else
+#define CONFIG_DM9000_BASE             0x08000000
+#endif
+
 #define DM9000_IO                      CONFIG_DM9000_BASE
 #define DM9000_DATA                    (CONFIG_DM9000_BASE+0x8004)
 
@@ -312,6 +331,9 @@
 /* write flash less slowly */
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
 
+/* Unlock to be used with Intel chips */
+#define CONFIG_SYS_FLASH_PROTECTION    1
+
 /* Flash environment locations */
 #define CONFIG_ENV_IS_IN_FLASH 1
 #define CONFIG_ENV_ADDR                (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) /* Addr of Environment Sector   */