board: advantech: dms-ba16: apply the proper register setting to fix the voltage...

[u-boot] / include / configs / vf610twr.h

diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 8749e6cc139745bbd7ddfe191cba293ade52351e..ee90045cadc766fbb09ec6a8511dad492bd4ecde 100644 (file)
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -11,9 +11,6 @@
 
 #include <asm/arch/imx-regs.h>
 
-#define CONFIG_VF610
-
-#define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_MACH_TYPE               4146
@@ -31,11 +28,8 @@
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
 
-#define CONFIG_BOARD_EARLY_INIT_F
-
 /* Allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE                        115200
 
 /* NAND support */
 #define CONFIG_CMD_NAND
@@ -43,7 +37,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_USE_ARCH_MEMCPY
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           NFC_BASE_ADDR
 
@@ -66,16 +59,10 @@
                                        "-(rootfs)"
 #endif
 
-#define CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 #define CONFIG_SYS_FSL_ESDHC_NUM       1
 
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-
-#define CONFIG_GENERIC_MMC
-#define CONFIG_DOS_PARTITION
-
 #define CONFIG_FEC_MXC
 #define CONFIG_MII
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
@@ -242,9 +229,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-/* FLASH and environment organization */
-#define CONFIG_SYS_NO_FLASH
-
 #ifdef CONFIG_ENV_IS_IN_MMC
 #define CONFIG_ENV_SIZE                        (8 * 1024)