Merge with /home/sr/git/u-boot/denx-merge-sr

[u-boot] / include / configs / yellowstone.h

diff --git a/include/configs/yellowstone.h b/include/configs/yellowstone.h
index cf42b666b00c83af41300a415b687f8a15e53962..911a52dbcfa29200a3a8aa5c4a6dc061a7903687 100644 (file)
--- a/include/configs/yellowstone.h
+++ b/include/configs/yellowstone.h
@@ -37,6 +37,7 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f     */
 #define CONFIG_MISC_INIT_R     1       /* call misc_init_r()           */
+#define CONFIG_BOARD_RESET     1       /* call board_reset()           */
 
 /*-----------------------------------------------------------------------
  * Base addresses -- Note these are effective addresses where the
@@ -65,6 +66,7 @@
 /*-----------------------------------------------------------------------
  * Initial RAM & stack pointer (placed in SDRAM)
  *----------------------------------------------------------------------*/
+#define CFG_INIT_RAM_DCACHE    1               /* d-cache as init ram  */
 #define CFG_INIT_RAM_ADDR      0x70000000              /* DCache       */
 #define CFG_INIT_RAM_END       (8 << 10)
 #define CFG_GBL_DATA_SIZE      256                     /* num bytes initial data*/
@@ -109,6 +111,8 @@
 #define CFG_FLASH_ERASE_TOUT   120000  /* Timeout for Flash Erase (in ms)      */
 #define CFG_FLASH_WRITE_TOUT   500     /* Timeout for Flash Write (in ms)      */
 
+#define CFG_FLASH_USE_BUFFER_WRITE 1   /* use buffered writes (20x faster)     */
+
 #define CFG_FLASH_EMPTY_INFO           /* print 'E' for empty sector on flinfo */
 
 #ifdef CFG_ENV_IS_IN_FLASH
@@ -297,6 +301,20 @@
  */
 #define CFG_BOOTMAPSZ          (8 << 20)       /* Initial Memory map for Linux */
 
+/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH              CFG_FLASH_BASE
+#define CFG_CPLD               0x80000000
+
+/* Memory Bank 0 (NOR-FLASH) initialization                                    */
+#define CFG_EBC_PB0AP          0x03017300
+#define CFG_EBC_PB0CR          (CFG_FLASH | 0xda000)
+
+/* Memory Bank 2 (CPLD) initialization                                         */
+#define CFG_EBC_PB2AP          0x04814500
+#define CFG_EBC_PB2CR          (CFG_CPLD | 0x18000)
+
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */