]> git.sur5r.net Git - u-boot/blobdiff - include/configs/zipitz2.h
microblaze: Enable TFTP put command
[u-boot] / include / configs / zipitz2.h
index ce65d1f1c6e2b30d3acd69c5b477bd1f9eca81d0..26204af2c29c9407eed3a79485b754b0d2534d28 100644 (file)
 /*
  * High Level Board Configuration Options
  */
-#define        CONFIG_PXA27X           1       /* Marvell PXA270 CPU */
+#define        CONFIG_CPU_PXA27X               1       /* Marvell PXA270 CPU */
 #define        CONFIG_ZIPITZ2          1       /* Zipit Z2 board */
+#define        CONFIG_SYS_TEXT_BASE    0x0
 
-#undef BOARD_LATE_INIT
-#undef CONFIG_SKIP_RELOCATE_UBOOT
+#undef CONFIG_BOARD_LATE_INIT
 #undef CONFIG_USE_IRQ
 #undef CONFIG_SKIP_LOWLEVEL_INIT
 
@@ -42,7 +42,6 @@
 #define CONFIG_ENV_SIZE                        0x20000
 
 #define        CONFIG_SYS_MALLOC_LEN           (128*1024)
-#define        CONFIG_SYS_GBL_DATA_SIZE        512
 #define        CONFIG_ARCH_CPU_INIT
 
 #define        CONFIG_BOOTCOMMAND                                              \
@@ -75,6 +74,7 @@
 #include <config_cmd_default.h>
 
 #undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
 #define        CONFIG_CMD_ENV
 #undef CONFIG_CMD_IMLS
 #define        CONFIG_CMD_MMC
@@ -177,7 +177,7 @@ unsigned char zipitz2_spi_read(void);
 #define        CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_DRAM_BASE
 
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
-#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048)
+#define        CONFIG_SYS_INIT_SP_ADDR         (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048)
 
 /*
  * NOR FLASH