ARM: socfpga: Adding clock frequency info for U-Boot

[u-boot] / include / image.h

diff --git a/include/image.h b/include/image.h
index 88e17fc91eb603744203e121a3d48e2a301f0782..df701e34705a3aa3e881e267192da05f3c3d87e7 100644 (file)
--- a/include/image.h
+++ b/include/image.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2008 Semihalf
  *
  * (C) Copyright 2000-2005
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  ********************************************************************
  * NOTE: This header file defines an interface to U-Boot. Including
  * this (unmodified) header file in another file is considered normal
@@ -21,6 +20,7 @@
 
 /* Define this to avoid #ifdefs later on */
 struct lmb;
+struct fdt_region;
 
 #ifdef USE_HOSTCC
 #include <sys/types.h>
@@ -153,6 +153,7 @@ enum {
        IH_OS_PLAN9,                    /* Plan 9       */
        IH_OS_OPENRTOS,         /* OpenRTOS     */
        IH_OS_ARM_TRUSTED_FIRMWARE,     /* ARM Trusted Firmware */
+       IH_OS_TEE,                      /* Trusted Execution Environment */
 
        IH_OS_COUNT,
 };
@@ -258,7 +259,7 @@ enum {
        IH_TYPE_MXSIMAGE,               /* Freescale MXSBoot Image      */
        IH_TYPE_GPIMAGE,                /* TI Keystone GPHeader Image   */
        IH_TYPE_ATMELIMAGE,             /* ATMEL ROM bootable Image     */
-       IH_TYPE_SOCFPGAIMAGE,           /* Altera SOCFPGA Preloader     */
+       IH_TYPE_SOCFPGAIMAGE,           /* Altera SOCFPGA CV/AV Preloader */
        IH_TYPE_X86_SETUP,              /* x86 setup.bin Image          */
        IH_TYPE_LPC32XXIMAGE,           /* x86 setup.bin Image          */
        IH_TYPE_LOADABLE,               /* A list of typeless images    */
@@ -267,11 +268,14 @@ enum {
        IH_TYPE_RKSPI,                  /* Rockchip SPI image           */
        IH_TYPE_ZYNQIMAGE,              /* Xilinx Zynq Boot Image */
        IH_TYPE_ZYNQMPIMAGE,            /* Xilinx ZynqMP Boot Image */
+       IH_TYPE_ZYNQMPBIF,              /* Xilinx ZynqMP Boot Image (bif) */
        IH_TYPE_FPGA,                   /* FPGA Image */
        IH_TYPE_VYBRIDIMAGE,    /* VYBRID .vyb Image */
        IH_TYPE_TEE,            /* Trusted Execution Environment OS Image */
        IH_TYPE_FIRMWARE_IVT,           /* Firmware Image with HABv4 IVT */
        IH_TYPE_PMMC,            /* TI Power Management Micro-Controller Firmware */
+       IH_TYPE_STM32IMAGE,             /* STMicroelectronics STM32 Image */
+       IH_TYPE_SOCFPGAIMAGE_V1,        /* Altera SOCFPGA A10 Preloader */
 
        IH_TYPE_COUNT,                  /* Number of image types */
 };
@@ -917,6 +921,7 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size);
 #define FIT_DEFAULT_PROP       "default"
 #define FIT_SETUP_PROP         "setup"
 #define FIT_FPGA_PROP          "fpga"
+#define FIT_FIRMWARE_PROP      "firmware"
 
 #define FIT_MAX_HASH_LEN       HASH_MAX_DIGEST_SIZE