Merge git://git.denx.de/u-boot-cfi-flash

[u-boot] / include / linux / mtd / nand.h

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 90c60101051814931f31c8982bd6ddd4d62a174b..d1db34c3343a02c7ebab6cc5cc519c01ae4ba744 100644 (file)
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -124,6 +124,8 @@ void nand_wait_ready(struct mtd_info *mtd);
 #define NAND_STATUS_READY      0x40
 #define NAND_STATUS_WP         0x80
 
+#define NAND_DATA_IFACE_CHECK_ONLY     -1
+
 /*
  * Constants for ECC_MODES
  */
@@ -202,6 +204,9 @@ typedef enum {
  */
 #define NAND_NEED_SCRAMBLING   0x00002000
 
+/* Device needs 3rd row address cycle */
+#define NAND_ROW_ADDR_3                0x00004000
+
 /* Options valid for Samsung large page devices */
 #define NAND_SAMSUNG_LP_OPTIONS NAND_CACHEPRG
 
@@ -485,6 +490,44 @@ struct nand_hw_control {
        struct nand_chip *active;
 };
 
+/**
+ * struct nand_ecc_step_info - ECC step information of ECC engine
+ * @stepsize: data bytes per ECC step
+ * @strengths: array of supported strengths
+ * @nstrengths: number of supported strengths
+ */
+struct nand_ecc_step_info {
+       int stepsize;
+       const int *strengths;
+       int nstrengths;
+};
+
+/**
+ * struct nand_ecc_caps - capability of ECC engine
+ * @stepinfos: array of ECC step information
+ * @nstepinfos: number of ECC step information
+ * @calc_ecc_bytes: driver's hook to calculate ECC bytes per step
+ */
+struct nand_ecc_caps {
+       const struct nand_ecc_step_info *stepinfos;
+       int nstepinfos;
+       int (*calc_ecc_bytes)(int step_size, int strength);
+};
+
+/* a shorthand to generate struct nand_ecc_caps with only one ECC stepsize */
+#define NAND_ECC_CAPS_SINGLE(__name, __calc, __step, ...)      \
+static const int __name##_strengths[] = { __VA_ARGS__ };       \
+static const struct nand_ecc_step_info __name##_stepinfo = {   \
+       .stepsize = __step,                                     \
+       .strengths = __name##_strengths,                        \
+       .nstrengths = ARRAY_SIZE(__name##_strengths),           \
+};                                                             \
+static const struct nand_ecc_caps __name = {                   \
+       .stepinfos = &__name##_stepinfo,                        \
+       .nstepinfos = 1,                                        \
+       .calc_ecc_bytes = __calc,                               \
+}
+
 /**
  * struct nand_ecc_ctrl - Control structure for ECC
  * @mode:      ECC mode
@@ -807,7 +850,10 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
  * @read_retries:      [INTERN] the number of read retry modes supported
  * @onfi_set_features: [REPLACEABLE] set the features for ONFI nand
  * @onfi_get_features: [REPLACEABLE] get the features for ONFI nand
- * @setup_data_interface: [OPTIONAL] setup the data interface and timing
+ * @setup_data_interface: [OPTIONAL] setup the data interface and timing. If
+ *                       chipnr is set to %NAND_DATA_IFACE_CHECK_ONLY this
+ *                       means the configuration should not be applied but
+ *                       only checked.
  * @bbt:               [INTERN] bad block table pointer
  * @bbt_td:            [REPLACEABLE] bad block table descriptor for flash
  *                     lookup.
@@ -851,9 +897,8 @@ struct nand_chip {
        int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
                        int feature_addr, uint8_t *subfeature_para);
        int (*setup_read_retry)(struct mtd_info *mtd, int retry_mode);
-       int (*setup_data_interface)(struct mtd_info *mtd,
-                                   const struct nand_data_interface *conf,
-                                   bool check_only);
+       int (*setup_data_interface)(struct mtd_info *mtd, int chipnr,
+                                   const struct nand_data_interface *conf);
 
 
        int chip_delay;
@@ -1214,6 +1259,15 @@ int nand_check_erased_ecc_chunk(void *data, int datalen,
                                void *extraoob, int extraooblen,
                                int threshold);
 
+int nand_check_ecc_caps(struct nand_chip *chip,
+                       const struct nand_ecc_caps *caps, int oobavail);
+
+int nand_match_ecc_req(struct nand_chip *chip,
+                      const struct nand_ecc_caps *caps,  int oobavail);
+
+int nand_maximize_ecc(struct nand_chip *chip,
+                     const struct nand_ecc_caps *caps, int oobavail);
+
 /* Reset and initialize a NAND device */
 int nand_reset(struct nand_chip *chip, int chipnr);