/* Exception offsets (PowerPC standard) */
#define EXC_OFF_SYS_RESET 0x0100
+/* useful macros for manipulating CSx_START/STOP */
+#if defined(CONFIG_MGT5100)
+#define START_REG(start) ((start) >> 15)
+#define STOP_REG(start, size) (((start) + (size) - 1) >> 15)
+#elif defined(CONFIG_MPC5200)
+#define START_REG(start) ((start) >> 16)
+#define STOP_REG(start, size) (((start) + (size) - 1) >> 16)
+#endif
+
/* Internal memory map */
#define MPC5XXX_CS0_START (CFG_MBAR + 0x0004)
#define MPC5XXX_CDM (CFG_MBAR + 0x0200)
#define MPC5XXX_LPB (CFG_MBAR + 0x0300)
#define MPC5XXX_ICTL (CFG_MBAR + 0x0500)
+#define MPC5XXX_GPT (CFG_MBAR + 0x0600)
#define MPC5XXX_GPIO (CFG_MBAR + 0x0b00)
#define MPC5XXX_PCI (CFG_MBAR + 0x0d00)
#define MPC5XXX_SDMA (CFG_MBAR + 0x1200)
#define MPC5XXX_FEC (CFG_MBAR + 0x3000)
+#define MPC5XXX_I2C1 (CFG_MBAR + 0x3D00)
+#define MPC5XXX_I2C2 (CFG_MBAR + 0x3D40)
+
#if defined(CONFIG_MGT5100)
#define MPC5XXX_SRAM (CFG_MBAR + 0x4000)
#define MPC5XXX_SRAM_SIZE (8*1024)
#define MPC5XXX_CS_DEADCYCLE (MPC5XXX_LPB + 0x002c)
#endif
+#if defined(CONFIG_MPC5200)
+/* XLB Arbiter registers */
+#define MPC5XXX_XLBARB_CFG (MPC5XXX_XLBARB + 0x40)
+#define MPC5XXX_XLBARB_MPRIEN (MPC5XXX_XLBARB + 0x64)
+#define MPC5XXX_XLBARB_MPRIVAL (MPC5XXX_XLBARB + 0x68)
+#endif
+
/* GPIO registers */
#define MPC5XXX_GPS_PORT_CONFIG (MPC5XXX_GPIO + 0x0000)
#define MPC5XXX_ICTL_PER_STS (MPC5XXX_ICTL + 0x0030)
#define MPC5XXX_ICTL_BUS_STS (MPC5XXX_ICTL + 0x0038)
+/* General Purpose Timers registers */
+#define MPC5XXX_GPT0_ENABLE (MPC5XXX_GPT + 0x0)
+#define MPC5XXX_GPT0_COUNTER (MPC5XXX_GPT + 0x4)
+
+/* I2Cn control register bits */
+#define I2C_EN 0x80
+#define I2C_IEN 0x40
+#define I2C_STA 0x20
+#define I2C_TX 0x10
+#define I2C_TXAK 0x08
+#define I2C_RSTA 0x04
+#define I2C_INIT_MASK (I2C_EN | I2C_STA | I2C_TX | I2C_RSTA)
+
+/* I2Cn status register bits */
+#define I2C_CF 0x80
+#define I2C_AAS 0x40
+#define I2C_BB 0x20
+#define I2C_AL 0x10
+#define I2C_SRW 0x04
+#define I2C_IF 0x02
+#define I2C_RXAK 0x01
+
/* Programmable Serial Controller (PSC) status register bits */
#define PSC_SR_CDE 0x0080
#define PSC_SR_RXRDY 0x0100
volatile u32 EU37; /* SDMA + 0xfc */
};
+struct mpc5xxx_i2c {
+ volatile u32 madr; /* I2Cn + 0x00 */
+ volatile u32 mfdr; /* I2Cn + 0x04 */
+ volatile u32 mcr; /* I2Cn + 0x08 */
+ volatile u32 msr; /* I2Cn + 0x0C */
+ volatile u32 mdr; /* I2Cn + 0x10 */
+};
+
/* function prototypes */
void loadtask(int basetask, int tasks);