Add NAND FLASH support for AMCC Bamboo 440EP eval board

[u-boot] / include / mpc5xxx.h

diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index fb0e41a34da922657cb198d81a4574bacbaf24d4..887dc3ea0bc00149585c0aab81aa3e22e7a730c4 100644 (file)
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -165,6 +165,23 @@
 /* GPIO registers */
 #define MPC5XXX_GPS_PORT_CONFIG        (MPC5XXX_GPIO + 0x0000)
 
+/* Standard GPIO registers (simple, output only and simple interrupt */
+#define MPC5XXX_GPIO_ENABLE     (MPC5XXX_GPIO + 0x0004)
+#define MPC5XXX_GPIO_ODE        (MPC5XXX_GPIO + 0x0008)
+#define MPC5XXX_GPIO_DIR        (MPC5XXX_GPIO + 0x000c)
+#define MPC5XXX_GPIO_DATA_O     (MPC5XXX_GPIO + 0x0010)
+#define MPC5XXX_GPIO_DATA_I     (MPC5XXX_GPIO + 0x0014)
+#define MPC5XXX_GPIO_OO_ENABLE  (MPC5XXX_GPIO + 0x0018)
+#define MPC5XXX_GPIO_OO_DATA    (MPC5XXX_GPIO + 0x001C)
+#define MPC5XXX_GPIO_SI_ENABLE  (MPC5XXX_GPIO + 0x0020)
+#define MPC5XXX_GPIO_SI_ODE     (MPC5XXX_GPIO + 0x0024)
+#define MPC5XXX_GPIO_SI_DIR     (MPC5XXX_GPIO + 0x0028)
+#define MPC5XXX_GPIO_SI_DATA    (MPC5XXX_GPIO + 0x002C)
+#define MPC5XXX_GPIO_SI_IEN     (MPC5XXX_GPIO + 0x0030)
+#define MPC5XXX_GPIO_SI_ITYPE   (MPC5XXX_GPIO + 0x0034)
+#define MPC5XXX_GPIO_SI_MEN     (MPC5XXX_GPIO + 0x0038)
+#define MPC5XXX_GPIO_SI_STATUS  (MPC5XXX_GPIO + 0x003C)
+
 /* WakeUp GPIO registers */
 #define MPC5XXX_WU_GPIO_ENABLE  (MPC5XXX_WU_GPIO + 0x0000)
 #define MPC5XXX_WU_GPIO_ODE     (MPC5XXX_WU_GPIO + 0x0004)
@@ -216,6 +233,22 @@
 /* General Purpose Timers registers */
 #define MPC5XXX_GPT0_ENABLE            (MPC5XXX_GPT + 0x0)
 #define MPC5XXX_GPT0_COUNTER           (MPC5XXX_GPT + 0x4)
+#define MPC5XXX_GPT1_ENABLE            (MPC5XXX_GPT + 0x10)
+#define MPC5XXX_GPT1_COUNTER           (MPC5XXX_GPT + 0x14)
+#define MPC5XXX_GPT2_ENABLE            (MPC5XXX_GPT + 0x20)
+#define MPC5XXX_GPT2_COUNTER           (MPC5XXX_GPT + 0x24)
+#define MPC5XXX_GPT3_ENABLE            (MPC5XXX_GPT + 0x30)
+#define MPC5XXX_GPT3_COUNTER           (MPC5XXX_GPT + 0x34)
+#define MPC5XXX_GPT4_ENABLE            (MPC5XXX_GPT + 0x40)
+#define MPC5XXX_GPT4_COUNTER           (MPC5XXX_GPT + 0x44)
+#define MPC5XXX_GPT5_ENABLE            (MPC5XXX_GPT + 0x50)
+#define MPC5XXX_GPT5_COUNTER           (MPC5XXX_GPT + 0x54)
+#define MPC5XXX_GPT6_ENABLE            (MPC5XXX_GPT + 0x60)
+#define MPC5XXX_GPT6_COUNTER           (MPC5XXX_GPT + 0x64)
+#define MPC5XXX_GPT7_ENABLE            (MPC5XXX_GPT + 0x70)
+#define MPC5XXX_GPT7_COUNTER           (MPC5XXX_GPT + 0x74)
+
+#define MPC5XXX_GPT7_PWMCFG            (MPC5XXX_GPT + 0x78)
 
 /* ATA registers */
 #define MPC5XXX_ATA_HOST_CONFIG         (MPC5XXX_ATA + 0x0000)