Add support for CATcenter board (based on PPChameleon ME module)

[u-boot] / include / mpc5xxx.h

diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index b38d7d4a0c28a78564de1895fe7dff0111b52e2e..fb0e41a34da922657cb198d81a4574bacbaf24d4 100644 (file)
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -89,7 +89,9 @@
 #define MPC5XXX_ICTL           (CFG_MBAR + 0x0500)
 #define MPC5XXX_GPT            (CFG_MBAR + 0x0600)
 #define MPC5XXX_GPIO           (CFG_MBAR + 0x0b00)
+#define MPC5XXX_WU_GPIO         (CFG_MBAR + 0x0c00)
 #define MPC5XXX_PCI            (CFG_MBAR + 0x0d00)
+#define MPC5XXX_USB            (CFG_MBAR + 0x1000)
 #define MPC5XXX_SDMA           (CFG_MBAR + 0x1200)
 #define MPC5XXX_XLBARB         (CFG_MBAR + 0x1f00)
 
@@ -107,6 +109,7 @@
 #endif
 
 #define        MPC5XXX_FEC             (CFG_MBAR + 0x3000)
+#define MPC5XXX_ATA             (CFG_MBAR + 0x3A00)
 
 #define MPC5XXX_I2C1           (CFG_MBAR + 0x3D00)
 #define MPC5XXX_I2C2           (CFG_MBAR + 0x3D40)
@@ -132,6 +135,7 @@
 #define MPC5XXX_CDM_JTAGID     (MPC5XXX_CDM + 0x0000)
 #define MPC5XXX_CDM_PORCFG     (MPC5XXX_CDM + 0x0004)
 #define MPC5XXX_CDM_CFG                (MPC5XXX_CDM + 0x000c)
+#define MPC5XXX_CDM_48_FDC     (MPC5XXX_CDM + 0x0010)
 #define MPC5XXX_CDM_SRESET     (MPC5XXX_CDM + 0x0020)
 
 /* Local Plus Bus interface */
@@ -151,9 +155,22 @@
 #define MPC5XXX_CS_DEADCYCLE   (MPC5XXX_LPB + 0x002c)
 #endif
 
+#if defined(CONFIG_MPC5200)
+/* XLB Arbiter registers */
+#define MPC5XXX_XLBARB_CFG             (MPC5XXX_XLBARB + 0x40)
+#define MPC5XXX_XLBARB_MPRIEN  (MPC5XXX_XLBARB + 0x64)
+#define MPC5XXX_XLBARB_MPRIVAL (MPC5XXX_XLBARB + 0x68)
+#endif
+
 /* GPIO registers */
 #define MPC5XXX_GPS_PORT_CONFIG        (MPC5XXX_GPIO + 0x0000)
 
+/* WakeUp GPIO registers */
+#define MPC5XXX_WU_GPIO_ENABLE  (MPC5XXX_WU_GPIO + 0x0000)
+#define MPC5XXX_WU_GPIO_ODE     (MPC5XXX_WU_GPIO + 0x0004)
+#define MPC5XXX_WU_GPIO_DIR     (MPC5XXX_WU_GPIO + 0x0008)
+#define MPC5XXX_WU_GPIO_DATA    (MPC5XXX_WU_GPIO + 0x000c)
+
 /* PCI registers */
 #define MPC5XXX_PCI_CMD                (MPC5XXX_PCI + 0x04)
 #define MPC5XXX_PCI_CFG                (MPC5XXX_PCI + 0x0c)
@@ -200,6 +217,12 @@
 #define MPC5XXX_GPT0_ENABLE            (MPC5XXX_GPT + 0x0)
 #define MPC5XXX_GPT0_COUNTER           (MPC5XXX_GPT + 0x4)
 
+/* ATA registers */
+#define MPC5XXX_ATA_HOST_CONFIG         (MPC5XXX_ATA + 0x0000)
+#define MPC5XXX_ATA_PIO1                (MPC5XXX_ATA + 0x0008)
+#define MPC5XXX_ATA_PIO2                (MPC5XXX_ATA + 0x000C)
+#define MPC5XXX_ATA_SHARE_COUNT         (MPC5XXX_ATA + 0x002C)
+
 /* I2Cn control register bits */
 #define I2C_EN         0x80
 #define I2C_IEN                0x40
@@ -278,6 +301,15 @@
 #define PSC_MODE_ONE_STOP              0x07
 #define PSC_MODE_TWO_STOP              0x0f
 
+/* ATA config fields */
+#define MPC5xxx_ATA_HOSTCONF_SMR       0x80000000UL    /* State machine
+                                                          reset */
+#define MPC5xxx_ATA_HOSTCONF_FR                0x40000000UL    /* FIFO Reset */
+#define MPC5xxx_ATA_HOSTCONF_IE                0x02000000UL    /* Enable interrupt
+                                                          in PIO */
+#define MPC5xxx_ATA_HOSTCONF_IORDY     0x01000000UL    /* Drive supports
+                                                          IORDY protocol */
+
 #ifndef __ASSEMBLY__
 struct mpc5xxx_psc {
        volatile u8     mode;           /* PSC + 0x00 */