Merge branch 'master' of /home/wd/git/u-boot/custodians

[u-boot] / include / mpc83xx.h

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 939b82541a26ca35432ea0eec4f2689b041553c3..5d82bb46f9ad97dd784bd876c1eb6c0ff70e43af 100644 (file)
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -30,7 +30,9 @@
 
 /* IMMRBAR - Internal Memory Register Base Address
  */
+#ifndef CONFIG_DEFAULT_IMMR
 #define CONFIG_DEFAULT_IMMR            0xFF400000      /* Default IMMR base address */
+#endif
 #define IMMRBAR                                0x0000          /* Register offset to immr */
 #define IMMRBAR_BASE_ADDR              0xFFF00000      /* Base address mask */
 #define IMMRBAR_RES                    ~(IMMRBAR_BASE_ADDR)
@@ -61,21 +63,26 @@
 #endif
 
 #define PARTID_NO_E(spridr)            ((spridr & 0xFFFE0000) >> 16)
-#define IS_E_PROCESSOR(spridr)         (!(spridr & 0x00010000)) /* has SEC */
+#define SPR_FAMILY(spridr)             ((spridr & 0xFFF00000) >> 20)
 
+#define SPR_831X_FAMILY                        0x80B
 #define SPR_8311                       0x80B2
 #define SPR_8313                       0x80B0
 #define SPR_8314                       0x80B6
 #define SPR_8315                       0x80B4
+#define SPR_832X_FAMILY                        0x806
 #define SPR_8321                       0x8066
 #define SPR_8323                       0x8062
+#define SPR_834X_FAMILY                        0x803
 #define SPR_8343                       0x8036
 #define SPR_8347_TBGA_                 0x8032
 #define SPR_8347_PBGA_                 0x8034
 #define SPR_8349                       0x8030
+#define SPR_836X_FAMILY                        0x804
 #define SPR_8358_TBGA_                 0x804A
 #define SPR_8358_PBGA_                 0x804E
 #define SPR_8360                       0x8048
+#define SPR_837X_FAMILY                        0x80C
 #define SPR_8377                       0x80C6
 #define SPR_8378                       0x80C4
 #define SPR_8379                       0x80C2
@@ -343,7 +350,9 @@
 /* ATR - Arbiter Timers Register
  */
 #define ATR_DTO                                0x00FF0000      /* Data time out */
+#define ATR_DTO_SHIFT                  16
 #define ATR_ATO                                0x000000FF      /* Address time out */
+#define ATR_ATO_SHIFT                  0
 
 /* AER - Arbiter Event Register
  */
@@ -357,10 +366,15 @@
 /* AEATR - Arbiter Event Address Register
  */
 #define AEATR_EVENT                    0x07000000      /* Event type */
+#define AEATR_EVENT_SHIFT              24
 #define AEATR_MSTR_ID                  0x001F0000      /* Master Id */
+#define AEATR_MSTR_ID_SHIFT            16
 #define AEATR_TBST                     0x00000800      /* Transfer burst */
+#define AEATR_TBST_SHIFT               11
 #define AEATR_TSIZE                    0x00000700      /* Transfer Size */
+#define AEATR_TSIZE_SHIFT              8
 #define AEATR_TTYPE                    0x0000001F      /* Transfer Type */
+#define AEATR_TTYPE_SHIFT              0
 
 /* HRCWL - Hard Reset Configuration Word Low
  */