MX35: mx35pdk: make use of GPIO framework

[u-boot] / include / mpc83xx.h

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 0ae83da65b5468f83f35281ef5b9c568a7454914..8292018287694d456bbb337d6393f29c58ae7a34 100644 (file)
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -694,14 +694,21 @@
 /* SPMR - System PLL Mode Register
  */
 #define SPMR_LBIUCM                    0x80000000
+#define SPMR_LBIUCM_SHIFT              31
 #define SPMR_DDRCM                     0x40000000
+#define SPMR_DDRCM_SHIFT               30
 #define SPMR_SPMF                      0x0F000000
+#define SPMR_SPMF_SHIFT                24
 #define SPMR_CKID                      0x00800000
 #define SPMR_CKID_SHIFT                        23
 #define SPMR_COREPLL                   0x007F0000
+#define SPMR_COREPLL_SHIFT             16
 #define SPMR_CEVCOD                    0x000000C0
+#define SPMR_CEVCOD_SHIFT              6
 #define SPMR_CEPDF                     0x00000020
+#define SPMR_CEPDF_SHIFT               5
 #define SPMR_CEPMF                     0x0000001F
+#define SPMR_CEPMF_SHIFT               0
 
 /* OCCR - Output Clock Control Register
  */
@@ -993,6 +1000,7 @@
 #define SDRAM_CFG_8_BE                 0x00040000
 #define SDRAM_CFG_NCAP                 0x00020000
 #define SDRAM_CFG_2T_EN                        0x00008000
+#define SDRAM_CFG_HSE                  0x00000008
 #define SDRAM_CFG_BI                   0x00000001
 
 /* DDR_SDRAM_MODE - DDR SDRAM Mode Register
@@ -1264,9 +1272,9 @@
 
 #ifndef __ASSEMBLY__
 struct pci_region;
-void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot);
+void mpc83xx_pci_init(int num_buses, struct pci_region **reg);
 void mpc83xx_pcislave_unlock(int bus);
-void mpc83xx_pcie_init(int num_buses, struct pci_region **reg, int warmboot);
+void mpc83xx_pcie_init(int num_buses, struct pci_region **reg);
 #endif
 
 #endif /* __MPC83XX_H__ */