[PATCH] Update some AMCC 4xx board config files (set initrd_high)

[u-boot] / include / ppc405.h

diff --git a/include/ppc405.h b/include/ppc405.h
index 64317b0e49dc358669186f5e6fb85fb8a731fa12..e475fa54cdf27751bb90bf745661c9aa1aea7ad6 100644 (file)
--- a/include/ppc405.h
+++ b/include/ppc405.h
@@ -160,6 +160,7 @@
   #define mem_bear    0x10    /* bus error address reg              */
 #endif
   #define mem_mcopt1  0x20    /* memory controller options 1        */
+  #define mem_status  0x24    /* memory status                      */
   #define mem_rtr     0x30    /* refresh timer reg                  */
   #define mem_pmit    0x34    /* power management idle timer        */
   #define mem_mb0cf   0x40    /* memory bank 0 configuration        */
@@ -481,6 +482,12 @@
 #define PLLMR1_266_133_66_33 (PLL_FBKDIV_8  |  \
                              PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
                              PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
+#define PLLMR0_266_66_33_33 (PLL_CPUDIV_1 | PLL_PLBDIV_4 |  \
+                             PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |  \
+                             PLL_MALDIV_1 | PLL_PCIDIV_2)
+#define PLLMR1_266_66_33_33 (PLL_FBKDIV_8  |  \
+                             PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
+                             PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
 
 /*
  * PLL Voltage Controlled Oscillator (VCO) definitions
@@ -557,12 +564,14 @@
 #define PSR_PCI_ARBIT_EN        0x00000400
 #define PSR_NEW_MODE_EN         0x00000020     /* PPC405GPr only */
 
+#ifndef CONFIG_IOP480
 /*
  * PLL Voltage Controlled Oscillator (VCO) definitions
  * Maximum and minimum values (in MHz) for correct PLL operation.
  */
 #define VCO_MIN     400
 #define VCO_MAX     800
+#endif /* #ifndef CONFIG_IOP480 */
 #endif /* #ifdef CONFIG_405EP */
 
 /******************************************************************************
@@ -675,6 +684,7 @@ typedef struct
   unsigned long freqPCI;
   unsigned long pciIntArbEn;            /* Internal PCI arbiter is enabled */
   unsigned long pciClkSync;             /* PCI clock is synchronous        */
+  unsigned long freqVCOHz;
 } PPC405_SYS_INFO;
 
 #endif  /* _ASMLANGUAGE */