]> git.sur5r.net Git - u-boot/blobdiff - include/ppc405.h
use CFG_WRITE_SWAPPED_DATA define instead of define CFG_FLASH_CFI_SWAP
[u-boot] / include / ppc405.h
index 1cd0c5594f7f19d3e6437c4a023a9c64197d2b1e..e475fa54cdf27751bb90bf745661c9aa1aea7ad6 100644 (file)
   #define mem_bear    0x10    /* bus error address reg              */
 #endif
   #define mem_mcopt1  0x20    /* memory controller options 1        */
+  #define mem_status  0x24    /* memory status                      */
   #define mem_rtr     0x30    /* refresh timer reg                  */
   #define mem_pmit    0x34    /* power management idle timer        */
   #define mem_mb0cf   0x40    /* memory bank 0 configuration        */
                              PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
                              PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
 #define PLLMR0_266_66_33_33 (PLL_CPUDIV_1 | PLL_PLBDIV_4 |  \
-                              PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |  \
-                              PLL_MALDIV_1 | PLL_PCIDIV_2)
+                             PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 |  \
+                             PLL_MALDIV_1 | PLL_PCIDIV_2)
 #define PLLMR1_266_66_33_33 (PLL_FBKDIV_8  |  \
-                              PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
-                              PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
+                             PLL_FWDDIVA_3 | PLL_FWDDIVB_3 |  \
+                             PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
 
 /*
  * PLL Voltage Controlled Oscillator (VCO) definitions