ppc/85xx: Clean up ATUM8548 PCI setup code

[u-boot] / include / ppc440.h

diff --git a/include/ppc440.h b/include/ppc440.h
index fe0db93b5146d8ea1a02937b5ba06666dfa07978..e60fa13905e7d0eae5ef2bb3554fd9da4a516387 100644 (file)
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -1276,7 +1276,8 @@
 #define CPC0_STRP1_PAE_MASK            (0x80000000 >> 11)
 #define CPC0_STRP1_PISE_MASK           (0x80000000 >> 13)
 #endif /* defined(CONFIG_440GP) */
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || \
+    defined(CONFIG_460EX) || defined(CONFIG_460GT)
 #define SDR0_SDSTP1_PAE_MASK           (0x80000000 >> 13)
 #define SDR0_SDSTP1_PISE_MASK          (0x80000000 >> 15)
 #endif /* defined(CONFIG_440GX) || defined(CONFIG_440SP) */
@@ -1701,31 +1702,17 @@
 #define PLLSYS1_NTO1_MASK      0x00000001      /* CPU:PLB N-to-1 ratio */
 #endif /* CONFIG_440GX */
 
-#if defined (CONFIG_440EPX) || defined (CONFIG_440GRX)
+#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+    defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 #define CPR0_ICFG_RLI_MASK     0x80000000
 #define CPR0_SPCID_SPCIDV0_MASK        0x03000000
+#define CPR0_SPCID_SPCIDV0_DIV1        0x01000000
+#define CPR0_SPCID_SPCIDV0_DIV2        0x02000000
+#define CPR0_SPCID_SPCIDV0_DIV3        0x03000000
+#define CPR0_SPCID_SPCIDV0_DIV4        0x00000000
 #define CPR0_PERD_PERDV0_MASK  0x07000000
 #endif
 
-/*-----------------------------------------------------------------------------
-| IIC Register Offsets
-'----------------------------------------------------------------------------*/
-#define IICMDBUF               0x00
-#define IICSDBUF               0x02
-#define IICLMADR               0x04
-#define IICHMADR               0x05
-#define IICCNTL                        0x06
-#define IICMDCNTL              0x07
-#define IICSTS                 0x08
-#define IICEXTSTS              0x09
-#define IICLSADR               0x0A
-#define IICHSADR               0x0B
-#define IIC0_CLKDIV            0x0C
-#define IICINTRMSK             0x0D
-#define IICXFRCNT              0x0E
-#define IICXTCNTLSS            0x0F
-#define IICDIRECTCNTL          0x10
-
 /*-----------------------------------------------------------------------------
 | PCI Internal Registers et. al. (accessed via plb)
 +----------------------------------------------------------------------------*/