ARM: zynq: Remove ZYNQ_BOOT_FREEBSD option

[u-boot] / include / spi.h

diff --git a/include/spi.h b/include/spi.h
index dbd0df89a72492fd4166a3cb6568c25012fe8580..4b88d3986e78cea0e3bf117a5b6351f88c011146 100644 (file)
--- a/include/spi.h
+++ b/include/spi.h
@@ -11,26 +11,27 @@
 #define _SPI_H_
 
 /* SPI mode flags */
-#define        SPI_CPHA        BIT(0)                  /* clock phase */
-#define        SPI_CPOL        BIT(1)                  /* clock polarity */
-#define        SPI_MODE_0      (0|0)                   /* (original MicroWire) */
-#define        SPI_MODE_1      (0|SPI_CPHA)
-#define        SPI_MODE_2      (SPI_CPOL|0)
-#define        SPI_MODE_3      (SPI_CPOL|SPI_CPHA)
-#define        SPI_CS_HIGH     BIT(2)                  /* CS active high */
-#define        SPI_LSB_FIRST   BIT(3)                  /* per-word bits-on-wire */
-#define        SPI_3WIRE       BIT(4)                  /* SI/SO signals shared */
-#define        SPI_LOOP        BIT(5)                  /* loopback mode */
-#define        SPI_SLAVE       BIT(6)                  /* slave mode */
-#define        SPI_PREAMBLE    BIT(7)                  /* Skip preamble bytes */
+#define SPI_CPHA       BIT(0)                  /* clock phase */
+#define SPI_CPOL       BIT(1)                  /* clock polarity */
+#define SPI_MODE_0     (0|0)                   /* (original MicroWire) */
+#define SPI_MODE_1     (0|SPI_CPHA)
+#define SPI_MODE_2     (SPI_CPOL|0)
+#define SPI_MODE_3     (SPI_CPOL|SPI_CPHA)
+#define SPI_CS_HIGH    BIT(2)                  /* CS active high */
+#define SPI_LSB_FIRST  BIT(3)                  /* per-word bits-on-wire */
+#define SPI_3WIRE      BIT(4)                  /* SI/SO signals shared */
+#define SPI_LOOP       BIT(5)                  /* loopback mode */
+#define SPI_SLAVE      BIT(6)                  /* slave mode */
+#define SPI_PREAMBLE   BIT(7)                  /* Skip preamble bytes */
 #define SPI_TX_BYTE    BIT(8)                  /* transmit with 1 wire byte */
-#define SPI_TX_QUAD    BIT(9)                  /* transmit with 4 wires */
+#define SPI_TX_DUAL    BIT(9)                  /* transmit with 2 wires */
+#define SPI_TX_QUAD    BIT(10)                 /* transmit with 4 wires */
 
 /* SPI mode_rx flags */
-#define SPI_RX_SLOW            BIT(0)
-#define SPI_RX_FAST            BIT(1)
-#define SPI_RX_DUAL            BIT(2)
-#define SPI_RX_QUAD            BIT(4)
+#define SPI_RX_SLOW    BIT(0)                  /* receive with 1 wire slow */
+#define SPI_RX_FAST    BIT(1)                  /* receive with 1 wire fast */
+#define SPI_RX_DUAL    BIT(2)                  /* receive with 2 wires */
+#define SPI_RX_QUAD    BIT(3)                  /* receive with 4 wires */
 
 /* SPI bus connection options - see enum spi_dual_flash */
 #define SPI_CONN_DUAL_SHARED           (1 << 0)
@@ -60,11 +61,13 @@ struct dm_spi_bus {
  * @cs:                Chip select number (0..n-1)
  * @max_hz:    Maximum bus speed that this slave can tolerate
  * @mode:      SPI mode to use for this device (see SPI mode flags)
+ * @mode_rx:   SPI RX mode to use for this slave (see SPI mode_rx flags)
  */
 struct dm_spi_slave_platdata {
        unsigned int cs;
        uint max_hz;
        uint mode;
+       u8 mode_rx;
 };
 
 #endif /* CONFIG_DM_SPI */