+/* SPDX-License-Identifier: GPL-2.0 */
/*
* (C) Copyright 2015 Xilinx, Inc,
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _ZYNQMPPL_H_
#define ZYNQMP_FPGA_OP_LOAD (1 << 1)
#define ZYNQMP_FPGA_OP_DONE (1 << 2)
+#define ZYNQMP_FPGA_FLAG_AUTHENTICATED BIT(2)
+#define ZYNQMP_FPGA_FLAG_ENCRYPTED BIT(3)
+
#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT 15
#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xf << \
ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)