]> git.sur5r.net Git - u-boot/blobdiff - lib/fdtdec.c
mx6slevk: Avoid hardcoded RAM size
[u-boot] / lib / fdtdec.c
index b50d10516105cc0c1c4c8a72a25eec24207a6916..0534c0b767d8d548e07cacd37a02eba7aa52bd41 100644 (file)
@@ -26,11 +26,8 @@ static const char * const compat_names[COMPAT_COUNT] = {
        COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
        COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
        COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
-       COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
-       COMPAT(NVIDIA_TEGRA124_DC, "nvidia,tegra124-dc"),
-       COMPAT(NVIDIA_TEGRA124_SOR, "nvidia,tegra124-sor"),
        COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
-       COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
+       COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"),
        COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
        COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
        COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
@@ -51,25 +48,20 @@ static const char * const compat_names[COMPAT_COUNT] = {
        COMPAT(SAMSUNG_EXYNOS5_DP, "samsung,exynos5-dp"),
        COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
        COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
-       COMPAT(SAMSUNG_EXYNOS_SERIAL, "samsung,exynos4210-uart"),
        COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
        COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
        COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
        COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
-       COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
        COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
        COMPAT(INTEL_MICROCODE, "intel,microcode"),
-       COMPAT(MEMORY_SPD, "memory-spd"),
        COMPAT(INTEL_PANTHERPOINT_AHCI, "intel,pantherpoint-ahci"),
        COMPAT(INTEL_MODEL_206AX, "intel,model-206ax"),
        COMPAT(INTEL_GMA, "intel,gma"),
        COMPAT(AMS_AS3722, "ams,as3722"),
        COMPAT(INTEL_ICH_SPI, "intel,ich-spi"),
        COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
-       COMPAT(INTEL_X86_PINCTRL, "intel,x86-pinctrl"),
        COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
        COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
-       COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"),
        COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
        COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
        COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
@@ -126,9 +118,10 @@ fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
 
        if (sizep) {
                *sizep = fdtdec_get_number(prop_size, ns);
-               debug("addr=%08llx, size=%llx\n", (u64)addr, (u64)*sizep);
+               debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
+                     (unsigned long long)*sizep);
        } else {
-               debug("addr=%08llx\n", (u64)addr);
+               debug("addr=%08llx\n", (unsigned long long)addr);
        }
 
        return addr;
@@ -833,6 +826,17 @@ int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
        return rc;
 }
 
+int fdtdec_get_child_count(const void *blob, int node)
+{
+       int subnode;
+       int num = 0;
+
+       fdt_for_each_subnode(blob, subnode, node)
+               num++;
+
+       return num;
+}
+
 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
                u8 *array, int count)
 {
@@ -1162,7 +1166,7 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index,
        if (fdtdec_get_bool(blob, node, "doubleclk"))
                dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
 
-       return 0;
+       return ret;
 }
 
 int fdtdec_setup(void)